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Commit 5c70cb01 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

ARM: dts: imx6q-sabreauto: Add basic support 



mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input

Add very basic support for it.

Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 49c9e60e

Documentation/devicetree/bindings/arm/fsl.txt

+4 −0
Original line number Diff line number Diff line
@@ -41,6 +41,10 @@ i.MX6 Quad SABRE Smart Device Board 
Required root node properties:

    - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";



i.MX6 Quad SABRE Automotive Board

Required root node properties:

    - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";



Generic i.MX boards

-------------------

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ 
	imx53-qsb.dtb \

	imx53-smd.dtb \

	imx6q-arm2.dtb \

	imx6q-sabreauto.dtb \

	imx6q-sabrelite.dtb \

	imx6q-sabresd.dtb

dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \

arch/arm/boot/dts/imx6q-sabreauto.dts

0 → 100644
+64 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Freescale Semiconductor, Inc.

 * Copyright 2011 Linaro Ltd.

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



/dts-v1/;

/include/ "imx6q.dtsi"



/ {

	model = "Freescale i.MX6 Quad SABRE Automotive Board";

	compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";



	memory {

		reg = <0x10000000 0x80000000>;

	};



	soc {

		aips-bus@02000000 { /* AIPS1 */

			iomuxc@020e0000 {

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_hog>;



				hog {

					pinctrl_hog: hoggrp {

						fsl,pins = <

							1376 0x80000000	/* MX6Q_PAD_NANDF_CS2__GPIO_6_15 */

							13   0x80000000	/* MX6Q_PAD_SD2_DAT2__GPIO_1_13 */

						>;

					};

				};

			};

		};



		aips-bus@02100000 { /* AIPS2 */

			uart4: serial@021f0000 {

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart4_1>;

				status = "okay";

			};



			ethernet@02188000 {

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_enet_2>;

				phy-mode = "rgmii";

				status = "okay";

			};



			usdhc@02198000 { /* uSDHC3 */

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_usdhc3_1>;

				cd-gpios = <&gpio6 15 0>;

				wp-gpios = <&gpio1 13 0>;

				status = "okay";

			};

		};

	};

};