Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5c274028 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'for-usb-linus-2014-02-04' of... 

Merge tag 'for-usb-linus-2014-02-04' of git://git.kernel.org/pub/scm/linux/kernel/git/sarah/xhci into usb-linus

Sarah writes:

xhci: Fix some regressions introduced in 3.14.

Hi Greg,

Here's four patches for 3.14.

One of them adds an xHCI host quirk, and the other three of them fix
regressions introduced in 3.14.  One regression causes USB 3.0 Link PM to
be enabled on all xHCI hosts (even those that may not support it), which
causes some USB 3.0 devices to not enumerate.  A second regression causes
some xHCI hosts that don't support 64-bit addressing to stop responding to
commands and die.

Note, these patches don't fix the recent usbfs regression that was caused
by commit 35773dac "usb: xhci: Link TRB
must not occur within a USB payload burst".  I'm waiting for those patches
to be tested.

Please pull usb-linus into usb-next, as I have feature patches that rely on
140e3026 Revert "usbcore: set lpm_capable field for LPM capable root
hubs"

Sarah Sharp
parents 38dbfb59 f7b2e403

drivers/usb/core/hcd.c

+0 −1
Original line number Diff line number Diff line
@@ -1032,7 +1032,6 @@ static int register_root_hub(struct usb_hcd *hcd) 
					dev_name(&usb_dev->dev), retval);

			return retval;

		}

		usb_dev->lpm_capable = usb_device_supports_lpm(usb_dev);

	}



	retval = usb_new_device (usb_dev);

drivers/usb/core/hub.c

+1 −6
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ struct usb_hub *usb_hub_to_struct_hub(struct usb_device *hdev) 
	return usb_get_intfdata(hdev->actconfig->interface[0]);

}



int usb_device_supports_lpm(struct usb_device *udev)

static int usb_device_supports_lpm(struct usb_device *udev)

{

	/* USB 2.1 (and greater) devices indicate LPM support through

	 * their USB 2.0 Extended Capabilities BOS descriptor.
@@ -149,11 +149,6 @@ int usb_device_supports_lpm(struct usb_device *udev) 
				"Power management will be impacted.\n");

		return 0;

	}



	/* udev is root hub */

	if (!udev->parent)

		return 1;



	if (udev->parent->lpm_capable)

		return 1;

drivers/usb/core/usb.h

+0 −1
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@ extern int usb_get_device_descriptor(struct usb_device *dev, 
		unsigned int size);

extern int usb_get_bos_descriptor(struct usb_device *dev);

extern void usb_release_bos_descriptor(struct usb_device *dev);

extern int usb_device_supports_lpm(struct usb_device *udev);

extern char *usb_cache_string(struct usb_device *udev, int index);

extern int usb_set_configuration(struct usb_device *dev, int configuration);

extern int usb_choose_configuration(struct usb_device *udev);

drivers/usb/host/xhci-dbg.c

+3 −3
Original line number Diff line number Diff line
@@ -203,12 +203,12 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num) 
				addr, (unsigned int)temp);



	addr = &ir_set->erst_base;

	temp_64 = readq(addr);

	temp_64 = xhci_read_64(xhci, addr);

	xhci_dbg(xhci, "  %p: ir_set.erst_base = @%08llx\n",

			addr, temp_64);



	addr = &ir_set->erst_dequeue;

	temp_64 = readq(addr);

	temp_64 = xhci_read_64(xhci, addr);

	xhci_dbg(xhci, "  %p: ir_set.erst_dequeue = @%08llx\n",

			addr, temp_64);

}
@@ -412,7 +412,7 @@ void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci) 
{

	u64 val;



	val = readq(&xhci->op_regs->cmd_ring);

	val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);

	xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = @%08x\n",

			lower_32_bits(val));

	xhci_dbg(xhci, "// xHC command ring deq ptr high bits = @%08x\n",

drivers/usb/host/xhci-mem.c

+7 −7
Original line number Diff line number Diff line
@@ -1958,7 +1958,7 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci) 
		xhci_warn(xhci, "WARN something wrong with SW event ring "

				"dequeue ptr.\n");

	/* Update HC event ring dequeue pointer */

	temp = readq(&xhci->ir_set->erst_dequeue);

	temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);

	temp &= ERST_PTR_MASK;

	/* Don't clear the EHB bit (which is RW1C) because

	 * there might be more events to service.
@@ -1967,7 +1967,7 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci) 
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Write event ring dequeue pointer, "

			"preserving EHB bit");

	writeq(((u64) deq & (u64) ~ERST_PTR_MASK) | temp,

	xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,

			&xhci->ir_set->erst_dequeue);

}
@@ -2269,7 +2269,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Device context base array address = 0x%llx (DMA), %p (virt)",

			(unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);

	writeq(dma, &xhci->op_regs->dcbaa_ptr);

	xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);



	/*

	 * Initialize the ring segment pool.  The ring must be a contiguous
@@ -2312,13 +2312,13 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
			(unsigned long long)xhci->cmd_ring->first_seg->dma);



	/* Set the address in the Command Ring Control register */

	val_64 = readq(&xhci->op_regs->cmd_ring);

	val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);

	val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |

		(xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |

		xhci->cmd_ring->cycle_state;

	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Setting command ring address to 0x%x", val);

	writeq(val_64, &xhci->op_regs->cmd_ring);

	xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);

	xhci_dbg_cmd_ptrs(xhci);



	xhci->lpm_command = xhci_alloc_command(xhci, true, true, flags);
@@ -2396,10 +2396,10 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 
	xhci_dbg_trace(xhci, trace_xhci_dbg_init,

			"// Set ERST base address for ir_set 0 = 0x%llx",

			(unsigned long long)xhci->erst.erst_dma_addr);

	val_64 = readq(&xhci->ir_set->erst_base);

	val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);

	val_64 &= ERST_PTR_MASK;

	val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);

	writeq(val_64, &xhci->ir_set->erst_base);

	xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);



	/* Set the event ring dequeue address */

	xhci_set_hc_event_deq(xhci);