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Commit 5a6bdf06 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq fix from Thomass Gleixner:
 "A bugfix for the atmel aic5 irq chip driver which caches the wrong
  data and thereby breaking resume"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()
parents c905929a d32dc9aa

drivers/irqchip/irq-atmel-aic5.c

+16 −8
Original line number Diff line number Diff line
@@ -88,28 +88,36 @@ static void aic5_mask(struct irq_data *d) 
{

	struct irq_domain *domain = d->domain;

	struct irq_domain_chip_generic *dgc = domain->gc;

	struct irq_chip_generic *gc = dgc->gc[0];

	struct irq_chip_generic *bgc = dgc->gc[0];

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);



	/* Disable interrupt on AIC5 */

	irq_gc_lock(gc);

	/*

	 * Disable interrupt on AIC5. We always take the lock of the

	 * first irq chip as all chips share the same registers.

	 */

	irq_gc_lock(bgc);

	irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);

	irq_reg_writel(gc, 1, AT91_AIC5_IDCR);

	gc->mask_cache &= ~d->mask;

	irq_gc_unlock(gc);

	irq_gc_unlock(bgc);

}



static void aic5_unmask(struct irq_data *d)

{

	struct irq_domain *domain = d->domain;

	struct irq_domain_chip_generic *dgc = domain->gc;

	struct irq_chip_generic *gc = dgc->gc[0];

	struct irq_chip_generic *bgc = dgc->gc[0];

	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);



	/* Enable interrupt on AIC5 */

	irq_gc_lock(gc);

	/*

	 * Enable interrupt on AIC5. We always take the lock of the

	 * first irq chip as all chips share the same registers.

	 */

	irq_gc_lock(bgc);

	irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR);

	irq_reg_writel(gc, 1, AT91_AIC5_IECR);

	gc->mask_cache |= d->mask;

	irq_gc_unlock(gc);

	irq_gc_unlock(bgc);

}



static int aic5_retrigger(struct irq_data *d)