+149
−73
+3
−25
+6
−31
Loading
Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more
When configured as a specific low power state: MFP_LPM_DRIVE_LOW, MFP_LPM_DRIVE_HIGH, the corresponding GPDR register bit during low power mode shall be re-configured as output (if they are not configured so), thus the PGSRx bits can output. Create an additional low power values GPDR registers, and properly save/restore the GAFR + GPDR registers when doing suspend/resume. Signed-off-by:Eric Miao <eric.miao@marvell.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>