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Commit 59bad947 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Daniel Vetter
Browse files

drm/i915: Rename the forcewake get/put functions 



We have multiple forcewake domains now on recent gens. Change the
function naming to reflect this.

v2: More verbose names (Chris)
v3: Rebase
v4: Rebase
v5: Add documentation for forcewake_get/put

Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com> (v2)
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 756c349d

drivers/gpu/drm/i915/i915_debugfs.c

+4 −4
Original line number Diff line number Diff line
@@ -1105,7 +1105,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 
		if (ret)

			goto out;



		gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);

		intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);



		reqf = I915_READ(GEN6_RPNSWREQ);

		reqf &= ~GEN6_TURBO_DISABLE;
@@ -1132,7 +1132,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 
			cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;

		cagf *= GT_FREQUENCY_MULTIPLIER;



		gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);

		intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

		mutex_unlock(&dev->struct_mutex);



		if (IS_GEN6(dev) || IS_GEN7(dev)) {
@@ -4322,7 +4322,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file) 
		return 0;



	intel_runtime_pm_get(dev_priv);

	gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);



	return 0;

}
@@ -4335,7 +4335,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file) 
	if (INTEL_INFO(dev)->gen < 6)

		return 0;



	gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

	intel_runtime_pm_put(dev_priv);



	return 0;

drivers/gpu/drm/i915/i915_drv.c

+1 −1
Original line number Diff line number Diff line
@@ -1431,7 +1431,7 @@ static int intel_runtime_suspend(struct device *device) 
		intel_opregion_notify_adapter(dev, PCI_D3hot);

	}



	assert_force_wake_inactive(dev_priv);

	assert_forcewakes_inactive(dev_priv);



	DRM_DEBUG_KMS("Device suspended\n");

	return 0;

drivers/gpu/drm/i915/i915_drv.h

+5 −10
Original line number Diff line number Diff line
@@ -2564,6 +2564,11 @@ extern void intel_uncore_check_errors(struct drm_device *dev); 
extern void intel_uncore_fini(struct drm_device *dev);

extern void intel_uncore_forcewake_reset(struct drm_device *dev, bool restore);

const char *intel_uncore_forcewake_domain_to_str(const int domain_id);

void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,

				unsigned fw_domains);

void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,

				unsigned fw_domains);

void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);



void

i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
@@ -3195,16 +3200,6 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e, 
					    struct drm_device *dev,

					    struct intel_display_error_state *error);



/* On SNB platform, before reading ring registers forcewake bit

 * must be set to prevent GT core from power down and stale values being

 * returned.

 */

void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv,

			    unsigned fw_domains);

void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv,

			    unsigned fw_domains);

void assert_force_wake_inactive(struct drm_i915_private *dev_priv);



int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);

int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val);

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -7871,7 +7871,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) 
	 * Make sure we're not on PC8 state before disabling PC8, otherwise

	 * we'll hang the machine. To prevent PC8 state, just enable force_wake.

	 */

	gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);



	if (val & LCPLL_POWER_DOWN_ALLOW) {

		val &= ~LCPLL_POWER_DOWN_ALLOW;
@@ -7901,7 +7901,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) 
			DRM_ERROR("Switching back to LCPLL failed\n");

	}



	gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);

	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);

}



/*

drivers/gpu/drm/i915/intel_fbc.c

+2 −2
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ static void snb_fbc_blit_update(struct drm_device *dev) 


	/* Blitter is part of Media powerwell on VLV. No impact of

	 * his param in other platforms for now */

	gen6_gt_force_wake_get(dev_priv, FORCEWAKE_MEDIA);

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);



	blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);

	blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY <<
@@ -195,7 +195,7 @@ static void snb_fbc_blit_update(struct drm_device *dev) 
	I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);

	POSTING_READ(GEN6_BLITTER_ECOSKPD);



	gen6_gt_force_wake_put(dev_priv, FORCEWAKE_MEDIA);

	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_MEDIA);

}



static void ilk_fbc_enable(struct drm_crtc *crtc)