Merge branches 'misc' and 'misc-rc6' into for-linus

  disable if zero.

  disable if zero.

- arm,prefetch-offset : Override prefetch offset value. Valid values are

- arm,prefetch-offset : Override prefetch offset value. Valid values are

  0-7, 15, 23, and 31.

  0-7, 15, 23, and 31.

- arm,shared-override : The default behavior of the pl310 cache controller with

- arm,shared-override : The default behavior of the L220 or PL310 cache

  respect to the shareable attribute is to transform "normal memory

  controllers with respect to the shareable attribute is to transform "normal

  non-cacheable transactions" into "cacheable no allocate" (for reads) or

  memory non-cacheable transactions" into "cacheable no allocate" (for reads)

  "write through no write allocate" (for writes).

  or "write through no write allocate" (for writes).

  On systems where this may cause DMA buffer corruption, this property must be

  On systems where this may cause DMA buffer corruption, this property must be

  specified to indicate that such transforms are precluded.

  specified to indicate that such transforms are precluded.

- arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310).

- arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).

- arm,outer-sync-disable : disable the outer sync operation on the L2 cache.

  Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that

  will randomly hang unless outer sync operations are disabled.

- prefetch-data : Data prefetch. Value: <0> (forcibly disable), <1>

- prefetch-data : Data prefetch. Value: <0> (forcibly disable), <1>

  (forcibly enable), property absent (retain settings set by firmware)

  (forcibly enable), property absent (retain settings set by firmware)

- prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable),

- prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable),

	select HARDIRQS_SW_RESEND

	select HARDIRQS_SW_RESEND

	select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)

	select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)

	select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6

	select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6

	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32

	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU

	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32

	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU

	select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)

	select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)

	select HAVE_ARCH_TRACEHOOK

	select HAVE_ARCH_TRACEHOOK

	select HAVE_ARM_SMCCC if CPU_V7

	select HAVE_BPF_JIT

	select HAVE_BPF_JIT

	select HAVE_CC_STACKPROTECTOR

	select HAVE_CC_STACKPROTECTOR

	select HAVE_CONTEXT_TRACKING

	select HAVE_CONTEXT_TRACKING

	select HAVE_DMA_API_DEBUG

	select HAVE_DMA_API_DEBUG

	select HAVE_DMA_ATTRS

	select HAVE_DMA_ATTRS

	select HAVE_DMA_CONTIGUOUS if MMU

	select HAVE_DMA_CONTIGUOUS if MMU

	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32

	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32 && MMU

	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU

	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU

	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)

	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)

	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)

	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)

	bool "Dummy Virtual Machine" if ARCH_MULTI_V7

	bool "Dummy Virtual Machine" if ARCH_MULTI_V7

	select ARM_AMBA

	select ARM_AMBA

	select ARM_GIC

	select ARM_GIC

	select ARM_GIC_V2M if PCI_MSI

	select ARM_GIC_V3

	select ARM_GIC_V3

	select ARM_PSCI

	select ARM_PSCI

	select HAVE_ARM_ARCH_TIMER

	select HAVE_ARM_ARCH_TIMER

config BL_SWITCHER

config BL_SWITCHER

	bool "big.LITTLE switcher support"

	bool "big.LITTLE switcher support"

	depends on BIG_LITTLE && MCPM && HOTPLUG_CPU

	depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC

	select ARM_CPU_SUSPEND

	select ARM_CPU_SUSPEND

	select CPU_PM

	select CPU_PM

	help

	help

config ARM_PSCI

config ARM_PSCI

	bool "Support for the ARM Power State Coordination Interface (PSCI)"

	bool "Support for the ARM Power State Coordination Interface (PSCI)"

	depends on CPU_V7

	depends on HAVE_ARM_SMCCC

	select ARM_PSCI_FW

	select ARM_PSCI_FW

	help

	help

	  Say Y here if you want Linux to communicate with system firmware

	  Say Y here if you want Linux to communicate with system firmware

config ARM_ASM_UNIFIED

config ARM_ASM_UNIFIED

	bool

	bool

config ARM_PATCH_IDIV

	bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"

	depends on CPU_32v7 && !XIP_KERNEL

	default y

	help

	  The ARM compiler inserts calls to __aeabi_idiv() and

	  __aeabi_uidiv() when it needs to perform division on signed

	  and unsigned integers. Some v7 CPUs have support for the sdiv

	  and udiv instructions that can be used to implement those

	  functions.

	  Enabling this option allows the kernel to modify itself to

	  replace the first two instructions of these library functions

	  with the sdiv or udiv plus "bx lr" instructions when the CPU

	  it is running on supports them. Typically this will be faster

	  and less power intensive than running the original library

	  code to do integer division.

config AEABI

config AEABI

	bool "Use the ARM EABI to compile the kernel"

	bool "Use the ARM EABI to compile the kernel"

	help

	help

#include <linux/types.h>

#include <linux/types.h>

#include <asm/opcodes.h>

#include <asm/opcodes.h>

#ifdef CONFIG_BUG

/*

/*

 * Use a suitable undefined instruction to use for ARM/Thumb2 bug handling.

 * Use a suitable undefined instruction to use for ARM/Thumb2 bug handling.

 * We need to be careful not to conflict with those used by other modules and

 * We need to be careful not to conflict with those used by other modules and

	unreachable();						\

	unreachable();						\

} while (0)

} while (0)

#else  /* not CONFIG_DEBUG_BUGVERBOSE */

#else

#define __BUG(__file, __line, __value)				\

#define __BUG(__file, __line, __value)				\

do {								\

do {								\

#endif  /* CONFIG_DEBUG_BUGVERBOSE */

#endif  /* CONFIG_DEBUG_BUGVERBOSE */

#define HAVE_ARCH_BUG

#define HAVE_ARCH_BUG

#endif  /* CONFIG_BUG */

#include <asm-generic/bug.h>

#include <asm-generic/bug.h>

struct device_node;

struct device_node;

struct cpuidle_ops {

struct cpuidle_ops {

	int (*suspend)(int cpu, unsigned long arg);

	int (*suspend)(unsigned long arg);

	int (*init)(struct device_node *, int cpu);

	int (*init)(struct device_node *, int cpu);

};

};

#include <linux/threads.h>

#include <linux/threads.h>

#include <asm/irq.h>

#include <asm/irq.h>

#define NR_IPI	8

#define NR_IPI	7

typedef struct {

typedef struct {

	unsigned int __softirq_pending;

	unsigned int __softirq_pending;