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Commit 5986ac4f authored by James Hartley's avatar James Hartley Committed by Herbert Xu
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Documentation: crypto: Add DT binding info for the img hw hash accelerator



This adds the binding documentation for the Imagination Technologies hash
accelerator that provides hardware acceleration for SHA1/SHA224/SHA256/MD5
hashes.  This hardware will be present in the upcoming pistachio SoC.

Signed-off-by: default avatarJames Hartley <james.hartley@imgtec.com>
Reviewed-by: default avatarAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent d358f1ab
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Imagination Technologies hardware hash accelerator

The hash accelerator provides hardware hashing acceleration for
SHA1, SHA224, SHA256 and MD5 hashes

Required properties:

- compatible : "img,hash-accelerator"
- reg : Offset and length of the register set for the module, and the DMA port
- interrupts : The designated IRQ line for the hashing module.
- dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt
- dma-names : Should be "tx"
- clocks : Clock specifiers
- clock-names : "sys" Used to clock the hash block registers
		"hash" Used to clock data through the accelerator

Example:

	hash: hash@18149600 {
	compatible = "img,hash-accelerator";
		reg = <0x18149600 0x100>, <0x18101100 0x4>;
		interrupts = <GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH>;
		dmas = <&dma 8 0xffffffff 0>;
		dma-names = "tx";
		clocks = <&cr_periph SYS_CLK_HASH>, <&clk_periph PERIPH_CLK_ROM>;
		clock-names = "sys", "hash";
	};