Loading arch/arm/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -142,6 +142,7 @@ machine-$(CONFIG_ARCH_MSM) := msm machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 machine-$(CONFIG_ARCH_MX1) := mx1 machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX25) := mx25 machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx Loading @@ -165,6 +166,7 @@ machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_W90X900) := w90x900 machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_ARCH_MXC91231) := mxc91231 # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. Loading arch/arm/mach-mx1/clock.c +29 −57 Original line number Diff line number Diff line Loading @@ -18,11 +18,14 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/list.h> #include <linux/math64.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <asm/clkdev.h> #include <mach/clock.h> #include <mach/hardware.h> #include <mach/common.h> Loading Loading @@ -94,7 +97,6 @@ static unsigned long clk16m_get_rate(struct clk *clk) } static struct clk clk16m = { .name = "CLK16M", .get_rate = clk16m_get_rate, .enable = _clk_enable, .enable_reg = CCM_CSCR, Loading @@ -111,7 +113,6 @@ static unsigned long clk32_get_rate(struct clk *clk) } static struct clk clk32 = { .name = "CLK32", .get_rate = clk32_get_rate, }; Loading @@ -121,7 +122,6 @@ static unsigned long clk32_premult_get_rate(struct clk *clk) } static struct clk clk32_premult = { .name = "CLK32_premultiplier", .parent = &clk32, .get_rate = clk32_premult_get_rate, }; Loading Loading @@ -156,7 +156,6 @@ static int prem_clk_set_parent(struct clk *clk, struct clk *parent) } static struct clk prem_clk = { .name = "prem_clk", .set_parent = prem_clk_set_parent, }; Loading @@ -167,7 +166,6 @@ static unsigned long system_clk_get_rate(struct clk *clk) } static struct clk system_clk = { .name = "system_clk", .parent = &prem_clk, .get_rate = system_clk_get_rate, }; Loading @@ -179,7 +177,6 @@ static unsigned long mcu_clk_get_rate(struct clk *clk) } static struct clk mcu_clk = { .name = "mcu_clk", .parent = &clk32_premult, .get_rate = mcu_clk_get_rate, }; Loading @@ -195,7 +192,6 @@ static unsigned long fclk_get_rate(struct clk *clk) } static struct clk fclk = { .name = "fclk", .parent = &mcu_clk, .get_rate = fclk_get_rate, }; Loading Loading @@ -238,7 +234,6 @@ static int hclk_set_rate(struct clk *clk, unsigned long rate) } static struct clk hclk = { .name = "hclk", .parent = &system_clk, .get_rate = hclk_get_rate, .round_rate = hclk_round_rate, Loading Loading @@ -280,7 +275,6 @@ static int clk48m_set_rate(struct clk *clk, unsigned long rate) } static struct clk clk48m = { .name = "CLK48M", .parent = &system_clk, .get_rate = clk48m_get_rate, .round_rate = clk48m_round_rate, Loading Loading @@ -400,21 +394,18 @@ static int perclk3_set_rate(struct clk *clk, unsigned long rate) static struct clk perclk[] = { { .name = "perclk", .id = 0, .parent = &system_clk, .get_rate = perclk1_get_rate, .round_rate = perclk1_round_rate, .set_rate = perclk1_set_rate, }, { .name = "perclk", .id = 1, .parent = &system_clk, .get_rate = perclk2_get_rate, .round_rate = perclk2_round_rate, .set_rate = perclk2_set_rate, }, { .name = "perclk", .id = 2, .parent = &system_clk, .get_rate = perclk3_get_rate, Loading Loading @@ -457,12 +448,10 @@ static int clko_set_parent(struct clk *clk, struct clk *parent) } static struct clk clko_clk = { .name = "clko_clk", .set_parent = clko_set_parent, }; static struct clk dma_clk = { .name = "dma", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -473,7 +462,6 @@ static struct clk dma_clk = { }; static struct clk csi_clk = { .name = "csi_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -484,7 +472,6 @@ static struct clk csi_clk = { }; static struct clk mma_clk = { .name = "mma_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -495,7 +482,6 @@ static struct clk mma_clk = { }; static struct clk usbd_clk = { .name = "usbd_clk", .parent = &clk48m, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -506,99 +492,85 @@ static struct clk usbd_clk = { }; static struct clk gpt_clk = { .name = "gpt_clk", .parent = &perclk[0], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk uart_clk = { .name = "uart", .parent = &perclk[0], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk i2c_clk = { .name = "i2c_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk spi_clk = { .name = "spi_clk", .parent = &perclk[1], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk sdhc_clk = { .name = "sdhc_clk", .parent = &perclk[1], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk lcdc_clk = { .name = "lcdc_clk", .parent = &perclk[1], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk mshc_clk = { .name = "mshc_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk ssi_clk = { .name = "ssi_clk", .parent = &perclk[2], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk rtc_clk = { .name = "rtc_clk", .parent = &clk32, }; static struct clk *mxc_clks[] = { &clk16m, &clk32, &clk32_premult, &prem_clk, &system_clk, &mcu_clk, &fclk, &hclk, &clk48m, &perclk[0], &perclk[1], &perclk[2], &clko_clk, &dma_clk, &csi_clk, &mma_clk, &usbd_clk, &gpt_clk, &uart_clk, &i2c_clk, &spi_clk, &sdhc_clk, &lcdc_clk, &mshc_clk, &ssi_clk, &rtc_clk, #define _REGISTER_CLOCK(d, n, c) \ { \ .dev_id = d, \ .con_id = n, \ .clk = &c, \ }, static struct clk_lookup lookups[] __initdata = { _REGISTER_CLOCK(NULL, "dma", dma_clk) _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk) _REGISTER_CLOCK(NULL, "mma", mma_clk) _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk) _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk) _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) _REGISTER_CLOCK("spi_imx.0", NULL, spi_clk) _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) _REGISTER_CLOCK(NULL, "mshc", mshc_clk) _REGISTER_CLOCK(NULL, "ssi", ssi_clk) _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk) }; int __init mx1_clocks_init(unsigned long fref) { struct clk **clkp; unsigned int reg; int i; /* disable clocks we are able to */ __raw_writel(0, SCM_GCCR); Loading @@ -620,13 +592,13 @@ int __init mx1_clocks_init(unsigned long fref) reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET; clko_clk.parent = (struct clk *)clko_clocks[reg]; for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) clk_register(*clkp); for (i = 0; i < ARRAY_SIZE(lookups); i++) clkdev_add(&lookups[i]); clk_enable(&hclk); clk_enable(&fclk); mxc_timer_init(&gpt_clk); mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT); return 0; } arch/arm/mach-mx1/devices.c +33 −54 Original line number Diff line number Diff line Loading @@ -29,12 +29,11 @@ #include "devices.h" static struct resource imx_csi_resources[] = { [0] = { { .start = 0x00224000, .end = 0x00224010, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = CSI_INT, .end = CSI_INT, .flags = IORESOURCE_IRQ, Loading @@ -55,12 +54,11 @@ struct platform_device imx_csi_device = { }; static struct resource imx_i2c_resources[] = { [0] = { { .start = 0x00217000, .end = 0x00217010, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = I2C_INT, .end = I2C_INT, .flags = IORESOURCE_IRQ, Loading @@ -75,22 +73,19 @@ struct platform_device imx_i2c_device = { }; static struct resource imx_uart1_resources[] = { [0] = { { .start = UART1_BASE_ADDR, .end = UART1_BASE_ADDR + 0xD0, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = UART1_MINT_RX, .end = UART1_MINT_RX, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = UART1_MINT_TX, .end = UART1_MINT_TX, .flags = IORESOURCE_IRQ, }, [3] = { }, { .start = UART1_MINT_RTS, .end = UART1_MINT_RTS, .flags = IORESOURCE_IRQ, Loading @@ -105,22 +100,19 @@ struct platform_device imx_uart1_device = { }; static struct resource imx_uart2_resources[] = { [0] = { { .start = UART2_BASE_ADDR, .end = UART2_BASE_ADDR + 0xD0, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = UART2_MINT_RX, .end = UART2_MINT_RX, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = UART2_MINT_TX, .end = UART2_MINT_TX, .flags = IORESOURCE_IRQ, }, [3] = { }, { .start = UART2_MINT_RTS, .end = UART2_MINT_RTS, .flags = IORESOURCE_IRQ, Loading @@ -135,17 +127,15 @@ struct platform_device imx_uart2_device = { }; static struct resource imx_rtc_resources[] = { [0] = { { .start = 0x00204000, .end = 0x00204024, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = RTC_INT, .end = RTC_INT, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = RTC_SAMINT, .end = RTC_SAMINT, .flags = IORESOURCE_IRQ, Loading @@ -160,12 +150,11 @@ struct platform_device imx_rtc_device = { }; static struct resource imx_wdt_resources[] = { [0] = { { .start = 0x00201000, .end = 0x00201008, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = WDT_INT, .end = WDT_INT, .flags = IORESOURCE_IRQ, Loading @@ -180,42 +169,35 @@ struct platform_device imx_wdt_device = { }; static struct resource imx_usb_resources[] = { [0] = { { .start = 0x00212000, .end = 0x00212148, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = USBD_INT0, .end = USBD_INT0, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = USBD_INT1, .end = USBD_INT1, .flags = IORESOURCE_IRQ, }, [3] = { }, { .start = USBD_INT2, .end = USBD_INT2, .flags = IORESOURCE_IRQ, }, [4] = { }, { .start = USBD_INT3, .end = USBD_INT3, .flags = IORESOURCE_IRQ, }, [5] = { }, { .start = USBD_INT4, .end = USBD_INT4, .flags = IORESOURCE_IRQ, }, [6] = { }, { .start = USBD_INT5, .end = USBD_INT5, .flags = IORESOURCE_IRQ, }, [7] = { }, { .start = USBD_INT6, .end = USBD_INT6, .flags = IORESOURCE_IRQ, Loading @@ -231,29 +213,26 @@ struct platform_device imx_usb_device = { /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { [0] = { { .chip.label = "gpio-0", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR), .irq = GPIO_INT_PORTA, .virtual_irq_start = MXC_GPIO_IRQ_START }, [1] = { .virtual_irq_start = MXC_GPIO_IRQ_START, }, { .chip.label = "gpio-1", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100), .irq = GPIO_INT_PORTB, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 }, [2] = { .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, { .chip.label = "gpio-2", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200), .irq = GPIO_INT_PORTC, .virtual_irq_start = MXC_GPIO_IRQ_START + 64 }, [3] = { .virtual_irq_start = MXC_GPIO_IRQ_START + 64, }, { .chip.label = "gpio-3", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300), .irq = GPIO_INT_PORTD, .virtual_irq_start = MXC_GPIO_IRQ_START + 96 .virtual_irq_start = MXC_GPIO_IRQ_START + 96, } }; Loading arch/arm/mach-mx1/generic.c +7 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,13 @@ static struct map_desc imx_io_desc[] __initdata = { void __init mx1_map_io(void) { mxc_set_cpu_type(MXC_CPU_MX1); mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR)); iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); } void __init mx1_init_irq(void) { mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); } arch/arm/mach-mx1/mx1ads.c +4 −6 Original line number Diff line number Diff line Loading @@ -104,12 +104,10 @@ static struct imxi2c_platform_data mx1ads_i2c_data = { static struct i2c_board_info mx1ads_i2c_devices[] = { { I2C_BOARD_INFO("pcf857x", 0x22), .type = "pcf8575", I2C_BOARD_INFO("pcf8575", 0x22), .platform_data = &pcf857x_data[0], }, { I2C_BOARD_INFO("pcf857x", 0x24), .type = "pcf8575", I2C_BOARD_INFO("pcf8575", 0x24), .platform_data = &pcf857x_data[1], }, }; Loading Loading @@ -151,7 +149,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx1_map_io, .init_irq = mxc_init_irq, .init_irq = mx1_init_irq, .timer = &mx1ads_timer, .init_machine = mx1ads_init, MACHINE_END Loading @@ -161,7 +159,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS") .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx1_map_io, .init_irq = mxc_init_irq, .init_irq = mx1_init_irq, .timer = &mx1ads_timer, .init_machine = mx1ads_init, MACHINE_END Loading
arch/arm/Makefile +2 −0 Original line number Diff line number Diff line Loading @@ -142,6 +142,7 @@ machine-$(CONFIG_ARCH_MSM) := msm machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 machine-$(CONFIG_ARCH_MX1) := mx1 machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX25) := mx25 machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx Loading @@ -165,6 +166,7 @@ machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_W90X900) := w90x900 machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_ARCH_MXC91231) := mxc91231 # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. Loading
arch/arm/mach-mx1/clock.c +29 −57 Original line number Diff line number Diff line Loading @@ -18,11 +18,14 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/list.h> #include <linux/math64.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <asm/clkdev.h> #include <mach/clock.h> #include <mach/hardware.h> #include <mach/common.h> Loading Loading @@ -94,7 +97,6 @@ static unsigned long clk16m_get_rate(struct clk *clk) } static struct clk clk16m = { .name = "CLK16M", .get_rate = clk16m_get_rate, .enable = _clk_enable, .enable_reg = CCM_CSCR, Loading @@ -111,7 +113,6 @@ static unsigned long clk32_get_rate(struct clk *clk) } static struct clk clk32 = { .name = "CLK32", .get_rate = clk32_get_rate, }; Loading @@ -121,7 +122,6 @@ static unsigned long clk32_premult_get_rate(struct clk *clk) } static struct clk clk32_premult = { .name = "CLK32_premultiplier", .parent = &clk32, .get_rate = clk32_premult_get_rate, }; Loading Loading @@ -156,7 +156,6 @@ static int prem_clk_set_parent(struct clk *clk, struct clk *parent) } static struct clk prem_clk = { .name = "prem_clk", .set_parent = prem_clk_set_parent, }; Loading @@ -167,7 +166,6 @@ static unsigned long system_clk_get_rate(struct clk *clk) } static struct clk system_clk = { .name = "system_clk", .parent = &prem_clk, .get_rate = system_clk_get_rate, }; Loading @@ -179,7 +177,6 @@ static unsigned long mcu_clk_get_rate(struct clk *clk) } static struct clk mcu_clk = { .name = "mcu_clk", .parent = &clk32_premult, .get_rate = mcu_clk_get_rate, }; Loading @@ -195,7 +192,6 @@ static unsigned long fclk_get_rate(struct clk *clk) } static struct clk fclk = { .name = "fclk", .parent = &mcu_clk, .get_rate = fclk_get_rate, }; Loading Loading @@ -238,7 +234,6 @@ static int hclk_set_rate(struct clk *clk, unsigned long rate) } static struct clk hclk = { .name = "hclk", .parent = &system_clk, .get_rate = hclk_get_rate, .round_rate = hclk_round_rate, Loading Loading @@ -280,7 +275,6 @@ static int clk48m_set_rate(struct clk *clk, unsigned long rate) } static struct clk clk48m = { .name = "CLK48M", .parent = &system_clk, .get_rate = clk48m_get_rate, .round_rate = clk48m_round_rate, Loading Loading @@ -400,21 +394,18 @@ static int perclk3_set_rate(struct clk *clk, unsigned long rate) static struct clk perclk[] = { { .name = "perclk", .id = 0, .parent = &system_clk, .get_rate = perclk1_get_rate, .round_rate = perclk1_round_rate, .set_rate = perclk1_set_rate, }, { .name = "perclk", .id = 1, .parent = &system_clk, .get_rate = perclk2_get_rate, .round_rate = perclk2_round_rate, .set_rate = perclk2_set_rate, }, { .name = "perclk", .id = 2, .parent = &system_clk, .get_rate = perclk3_get_rate, Loading Loading @@ -457,12 +448,10 @@ static int clko_set_parent(struct clk *clk, struct clk *parent) } static struct clk clko_clk = { .name = "clko_clk", .set_parent = clko_set_parent, }; static struct clk dma_clk = { .name = "dma", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -473,7 +462,6 @@ static struct clk dma_clk = { }; static struct clk csi_clk = { .name = "csi_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -484,7 +472,6 @@ static struct clk csi_clk = { }; static struct clk mma_clk = { .name = "mma_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -495,7 +482,6 @@ static struct clk mma_clk = { }; static struct clk usbd_clk = { .name = "usbd_clk", .parent = &clk48m, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, Loading @@ -506,99 +492,85 @@ static struct clk usbd_clk = { }; static struct clk gpt_clk = { .name = "gpt_clk", .parent = &perclk[0], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk uart_clk = { .name = "uart", .parent = &perclk[0], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk i2c_clk = { .name = "i2c_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk spi_clk = { .name = "spi_clk", .parent = &perclk[1], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk sdhc_clk = { .name = "sdhc_clk", .parent = &perclk[1], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk lcdc_clk = { .name = "lcdc_clk", .parent = &perclk[1], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk mshc_clk = { .name = "mshc_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk ssi_clk = { .name = "ssi_clk", .parent = &perclk[2], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, }; static struct clk rtc_clk = { .name = "rtc_clk", .parent = &clk32, }; static struct clk *mxc_clks[] = { &clk16m, &clk32, &clk32_premult, &prem_clk, &system_clk, &mcu_clk, &fclk, &hclk, &clk48m, &perclk[0], &perclk[1], &perclk[2], &clko_clk, &dma_clk, &csi_clk, &mma_clk, &usbd_clk, &gpt_clk, &uart_clk, &i2c_clk, &spi_clk, &sdhc_clk, &lcdc_clk, &mshc_clk, &ssi_clk, &rtc_clk, #define _REGISTER_CLOCK(d, n, c) \ { \ .dev_id = d, \ .con_id = n, \ .clk = &c, \ }, static struct clk_lookup lookups[] __initdata = { _REGISTER_CLOCK(NULL, "dma", dma_clk) _REGISTER_CLOCK("mx1-camera.0", NULL, csi_clk) _REGISTER_CLOCK(NULL, "mma", mma_clk) _REGISTER_CLOCK("imx_udc.0", NULL, usbd_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk) _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk) _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) _REGISTER_CLOCK("spi_imx.0", NULL, spi_clk) _REGISTER_CLOCK("imx-mmc.0", NULL, sdhc_clk) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) _REGISTER_CLOCK(NULL, "mshc", mshc_clk) _REGISTER_CLOCK(NULL, "ssi", ssi_clk) _REGISTER_CLOCK("mxc_rtc.0", NULL, rtc_clk) }; int __init mx1_clocks_init(unsigned long fref) { struct clk **clkp; unsigned int reg; int i; /* disable clocks we are able to */ __raw_writel(0, SCM_GCCR); Loading @@ -620,13 +592,13 @@ int __init mx1_clocks_init(unsigned long fref) reg = (reg & CCM_CSCR_CLKO_MASK) >> CCM_CSCR_CLKO_OFFSET; clko_clk.parent = (struct clk *)clko_clocks[reg]; for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) clk_register(*clkp); for (i = 0; i < ARRAY_SIZE(lookups); i++) clkdev_add(&lookups[i]); clk_enable(&hclk); clk_enable(&fclk); mxc_timer_init(&gpt_clk); mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT); return 0; }
arch/arm/mach-mx1/devices.c +33 −54 Original line number Diff line number Diff line Loading @@ -29,12 +29,11 @@ #include "devices.h" static struct resource imx_csi_resources[] = { [0] = { { .start = 0x00224000, .end = 0x00224010, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = CSI_INT, .end = CSI_INT, .flags = IORESOURCE_IRQ, Loading @@ -55,12 +54,11 @@ struct platform_device imx_csi_device = { }; static struct resource imx_i2c_resources[] = { [0] = { { .start = 0x00217000, .end = 0x00217010, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = I2C_INT, .end = I2C_INT, .flags = IORESOURCE_IRQ, Loading @@ -75,22 +73,19 @@ struct platform_device imx_i2c_device = { }; static struct resource imx_uart1_resources[] = { [0] = { { .start = UART1_BASE_ADDR, .end = UART1_BASE_ADDR + 0xD0, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = UART1_MINT_RX, .end = UART1_MINT_RX, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = UART1_MINT_TX, .end = UART1_MINT_TX, .flags = IORESOURCE_IRQ, }, [3] = { }, { .start = UART1_MINT_RTS, .end = UART1_MINT_RTS, .flags = IORESOURCE_IRQ, Loading @@ -105,22 +100,19 @@ struct platform_device imx_uart1_device = { }; static struct resource imx_uart2_resources[] = { [0] = { { .start = UART2_BASE_ADDR, .end = UART2_BASE_ADDR + 0xD0, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = UART2_MINT_RX, .end = UART2_MINT_RX, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = UART2_MINT_TX, .end = UART2_MINT_TX, .flags = IORESOURCE_IRQ, }, [3] = { }, { .start = UART2_MINT_RTS, .end = UART2_MINT_RTS, .flags = IORESOURCE_IRQ, Loading @@ -135,17 +127,15 @@ struct platform_device imx_uart2_device = { }; static struct resource imx_rtc_resources[] = { [0] = { { .start = 0x00204000, .end = 0x00204024, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = RTC_INT, .end = RTC_INT, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = RTC_SAMINT, .end = RTC_SAMINT, .flags = IORESOURCE_IRQ, Loading @@ -160,12 +150,11 @@ struct platform_device imx_rtc_device = { }; static struct resource imx_wdt_resources[] = { [0] = { { .start = 0x00201000, .end = 0x00201008, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = WDT_INT, .end = WDT_INT, .flags = IORESOURCE_IRQ, Loading @@ -180,42 +169,35 @@ struct platform_device imx_wdt_device = { }; static struct resource imx_usb_resources[] = { [0] = { { .start = 0x00212000, .end = 0x00212148, .flags = IORESOURCE_MEM, }, [1] = { }, { .start = USBD_INT0, .end = USBD_INT0, .flags = IORESOURCE_IRQ, }, [2] = { }, { .start = USBD_INT1, .end = USBD_INT1, .flags = IORESOURCE_IRQ, }, [3] = { }, { .start = USBD_INT2, .end = USBD_INT2, .flags = IORESOURCE_IRQ, }, [4] = { }, { .start = USBD_INT3, .end = USBD_INT3, .flags = IORESOURCE_IRQ, }, [5] = { }, { .start = USBD_INT4, .end = USBD_INT4, .flags = IORESOURCE_IRQ, }, [6] = { }, { .start = USBD_INT5, .end = USBD_INT5, .flags = IORESOURCE_IRQ, }, [7] = { }, { .start = USBD_INT6, .end = USBD_INT6, .flags = IORESOURCE_IRQ, Loading @@ -231,29 +213,26 @@ struct platform_device imx_usb_device = { /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { [0] = { { .chip.label = "gpio-0", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR), .irq = GPIO_INT_PORTA, .virtual_irq_start = MXC_GPIO_IRQ_START }, [1] = { .virtual_irq_start = MXC_GPIO_IRQ_START, }, { .chip.label = "gpio-1", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100), .irq = GPIO_INT_PORTB, .virtual_irq_start = MXC_GPIO_IRQ_START + 32 }, [2] = { .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, { .chip.label = "gpio-2", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200), .irq = GPIO_INT_PORTC, .virtual_irq_start = MXC_GPIO_IRQ_START + 64 }, [3] = { .virtual_irq_start = MXC_GPIO_IRQ_START + 64, }, { .chip.label = "gpio-3", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300), .irq = GPIO_INT_PORTD, .virtual_irq_start = MXC_GPIO_IRQ_START + 96 .virtual_irq_start = MXC_GPIO_IRQ_START + 96, } }; Loading
arch/arm/mach-mx1/generic.c +7 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,13 @@ static struct map_desc imx_io_desc[] __initdata = { void __init mx1_map_io(void) { mxc_set_cpu_type(MXC_CPU_MX1); mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR)); iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); } void __init mx1_init_irq(void) { mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); }
arch/arm/mach-mx1/mx1ads.c +4 −6 Original line number Diff line number Diff line Loading @@ -104,12 +104,10 @@ static struct imxi2c_platform_data mx1ads_i2c_data = { static struct i2c_board_info mx1ads_i2c_devices[] = { { I2C_BOARD_INFO("pcf857x", 0x22), .type = "pcf8575", I2C_BOARD_INFO("pcf8575", 0x22), .platform_data = &pcf857x_data[0], }, { I2C_BOARD_INFO("pcf857x", 0x24), .type = "pcf8575", I2C_BOARD_INFO("pcf8575", 0x24), .platform_data = &pcf857x_data[1], }, }; Loading Loading @@ -151,7 +149,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx1_map_io, .init_irq = mxc_init_irq, .init_irq = mx1_init_irq, .timer = &mx1ads_timer, .init_machine = mx1ads_init, MACHINE_END Loading @@ -161,7 +159,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS") .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, .map_io = mx1_map_io, .init_irq = mxc_init_irq, .init_irq = mx1_init_irq, .timer = &mx1ads_timer, .init_machine = mx1ads_init, MACHINE_END