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Commit 582be6b4 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
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drm/i915: Only enable IPS polling for gen5 



On SandyBridge IPS was entirely implemented in hardware and not reliant
on the driver monitoring power consumption and feeding back desired run
states, so the hardware is able to adapt quicker and more flexibly. Which
is a huge relief for us as we no longer have to carry empirically
derived magic algorithms.

Yet despite the advance in technology, the driver was still doing its
IPS polling on all machines. Restrict it to the only supported hardware,
Clarkdale/Arrandale.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 6d171cb4

drivers/gpu/drm/i915/i915_debugfs.c

+3 −0
Original line number Diff line number Diff line
@@ -1193,6 +1193,9 @@ static int i915_emon_status(struct seq_file *m, void *unused) 
	unsigned long temp, chipset, gfx;

	int ret;



	if (!IS_GEN5(dev))

		return -ENODEV;



	ret = mutex_lock_interruptible(&dev->struct_mutex);

	if (ret)

		return ret;

drivers/gpu/drm/i915/i915_dma.c

+10 −5
Original line number Diff line number Diff line
@@ -1520,6 +1520,9 @@ void i915_update_gfx_val(struct drm_i915_private *dev_priv) 
	unsigned long diffms;

	u32 count;



	if (dev_priv->info->gen != 5)

		return;



	getrawmonotonic(&now);

	diff1 = timespec_sub(now, dev_priv->last_time2);
@@ -1959,12 +1962,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,

		    (unsigned long) dev);



	if (IS_GEN5(dev)) {

		spin_lock(&mchdev_lock);

		i915_mch_dev = dev_priv;

		dev_priv->mchdev_lock = &mchdev_lock;

		spin_unlock(&mchdev_lock);



		ips_ping_for_i915_load();

	}



	return 0;