Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 56fa81fc authored by Govindraj Raja's avatar Govindraj Raja Committed by Ralf Baechle
Browse files

MIPS: scache: Fix scache init with invalid line size. 



In current scache init cache line_size is determined from
cpu config register, however if there there no scache
then mips_sc_probe_cm3 function populates a invalid line_size of 2.

The invalid line_size can cause a NULL pointer deference
during r4k_dma_cache_inv as r4k_blast_scache is populated
based on line_size. Scache line_size of 2 is invalid option in
r4k_blast_scache_setup.

This issue was faced during a MIPS I6400 based virtual platform bring up
where scache was not available in virtual platform model.

Signed-off-by: default avatarGovindraj Raja <Govindraj.Raja@imgtec.com>
Fixes: 7d53e9c4("MIPS: CM3: Add support for CM3 L2 cache.")
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hartley <James.Hartley@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # v4.2+
Patchwork: https://patchwork.linux-mips.org/patch/12710/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 51ff5d77

arch/mips/mm/sc-mips.c

+9 −4
Original line number Diff line number Diff line
@@ -164,10 +164,12 @@ static int __init mips_sc_probe_cm3(void) 


	sets = cfg & CM_GCR_L2_CONFIG_SET_SIZE_MSK;

	sets >>= CM_GCR_L2_CONFIG_SET_SIZE_SHF;

	if (sets)

		c->scache.sets = 64 << sets;



	line_sz = cfg & CM_GCR_L2_CONFIG_LINE_SIZE_MSK;

	line_sz >>= CM_GCR_L2_CONFIG_LINE_SIZE_SHF;

	if (line_sz)

		c->scache.linesz = 2 << line_sz;



	assoc = cfg & CM_GCR_L2_CONFIG_ASSOC_MSK;
@@ -176,11 +178,14 @@ static int __init mips_sc_probe_cm3(void) 
	c->scache.waysize = c->scache.sets * c->scache.linesz;

	c->scache.waybit = __ffs(c->scache.waysize);



	if (c->scache.linesz) {

		c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;



		return 1;

	}



	return 0;

}



static inline int __init mips_sc_probe(void)

{

	struct cpuinfo_mips *c = &current_cpu_data;