Merge remote-tracking branch 'asoc/topic/davinci' into asoc-next

AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC

This device has no control interface.

Required properties:

  - compatible : "asahi-kasei,ak5386"

Optional properties:

  - reset-gpio : a GPIO spec for the reset/power down pin.

		 If specified, it will be deasserted at probe time.

Example:

spdif: ak5386@0 {

	compatible = "asahi-kasei,ak5386";

	reset-gpio = <&gpio0 23>;

};

NVIDIA Tegra30 AHUB (Audio Hub)

Required properties:

- compatible : "nvidia,tegra30-ahub"

- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub", etc.

- reg : Should contain the register physical address and length for each of

  the AHUB's APBIF registers and the AHUB's own registers.

  the AHUB's register blocks.

  - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.

  - Tegra114 requires an additional entry, for the APBIF2 register block.

- interrupts : Should contain AHUB interrupt

- nvidia,dma-request-selector : The Tegra DMA controller's phandle and

  request selector for the first APBIF channel.

- nvidia,dma-request-selector : A list of the DMA channel specifiers. Each

  entry contains the Tegra DMA controller's phandle and request selector.

  If a single entry is present, the request selectors for the channels are

  assumed to be contiguous, and increment from this value.

  If multiple values are given, one value must be given per channel.

- clocks : Must contain an entry for each required entry in clock-names.

- clock-names : Must include the following entries:

  - Tegra30: Requires d_audio, apbif, i2s0, i2s1, i2s2, i2s3, i2s4, dam0,

    dam1, dam2, spdif_in.

  - Tegra114: Additionally requires amx, adx.

- ranges : The bus address mapping for the configlink register bus.

  Can be empty since the mapping is 1:1.

- #address-cells : For the configlink bus. Should be <1>;

	reg = <0x70080000 0x200 0x70080200 0x100>;

	interrupts = < 0 103 0x04 >;

	nvidia,dma-request-selector = <&apbdma 1>;

	clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,

		<&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,

		<&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,

		<&tegra_car 110>, <&tegra_car 162>;

	clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",

		"i2s3", "i2s4", "dam0", "dam1", "dam2",

		"spdif_in";

	ranges;

	#address-cells = <1>;

	#size-cells = <1>;

Texas Instruments TAS5086 6-channel PWM Processor

Required properties:

 - compatible:		Should contain "ti,tas5086".

 - reg:			The i2c address. Should contain <0x1b>.

Optional properties:

 - reset-gpio: 		A GPIO spec to define which pin is connected to the

			chip's !RESET pin. If specified, the driver will

			assert a hardware reset at probe time.

 - ti,charge-period:	This property should contain the time in microseconds

			that closely matches the external single-ended

			split-capacitor charge period. The hardware chip

			waits for this period of time before starting the

			PWM signals. This helps reduce pops and clicks.

			When not specified, the hardware default of 1300ms

			is retained.

Examples:

	i2c_bus {

		tas5086@1b {

			compatible = "ti,tas5086";

			reg = <0x1b>;

			reset-gpio = <&gpio 23 0>;

			ti,charge-period = <156000>;

		};

	};

#include <plat/regs-serial.h>

#include <mach/regs-gpio.h>

#include <plat/regs-ac97.h>

#include <plat/regs-dma.h>

#include <mach/regs-lcd.h>

#include <mach/regs-sdi.h>

#include <plat/regs-iis.h>

#include <plat/regs-spi.h>

static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {

#include <plat/regs-serial.h>

#include <mach/regs-gpio.h>

#include <plat/regs-ac97.h>

#include <plat/regs-dma.h>

#include <mach/regs-lcd.h>

#include <mach/regs-sdi.h>

#include <plat/regs-iis.h>

#include <plat/regs-spi.h>

#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }