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Commit 54b38463 authored by Simon Horman's avatar Simon Horman Committed by Paul Mundt
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mmc, sh: Remove sh_mmcif_boot_slurp()



As the only caller of sh_mmcif_boot_do_read() is
sh_mmcif_boot_slurp() the configuration portion of
sh_mmcif_boot_slurp() can be merged into sh_mmcif_boot_do_read().

Once this is done sh_mmcif_boot_slurp() is only a call
to sh_mmcif_boot_do_read() with platform specific information -
the offset that images are stored on MMC. So make the
sh_mmcif_boot_do_read() call directly from platform code
and remove sh_mmcif_boot_slurp() altogether.

Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: default avatarSimon Horman <horms@verge.net.au>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 9f843706
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+3 −1
Original line number Diff line number Diff line
@@ -60,7 +60,9 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
	mmcif_update_progress(MMCIF_PROGRESS_LOAD);

	/* load kernel via MMCIF interface */
	sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes);
	sh_mmcif_boot_do_read(MMCIF_BASE, 512,
	                      (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
			      buf);

	/* disable clock to the MMCIF hardware block */
	__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
+11 −23
Original line number Diff line number Diff line
@@ -162,6 +162,17 @@ static inline int sh_mmcif_boot_do_read(void __iomem *base,
	unsigned long k;
	int ret = 0;

	/* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
	sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
			CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
			SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);

	/* CMD9 - Get CSD */
	sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);

	/* CMD7 - Select the card */
	sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);

	/* CMD16 - Set the block size */
	sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS);

@@ -205,27 +216,4 @@ static inline void sh_mmcif_boot_init(void __iomem *base)
	sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000);
}

static inline void sh_mmcif_boot_slurp(void __iomem *base,
				       unsigned char *buf,
				       unsigned long no_bytes)
{
	unsigned long tmp;

	/* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
	sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
			CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
			SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);

	/* CMD9 - Get CSD */
	sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);

	/* CMD7 - Select the card */
	sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);

	tmp = no_bytes / SH_MMCIF_BBS;
	tmp += (no_bytes % SH_MMCIF_BBS) ? 1 : 0;

	sh_mmcif_boot_do_read(base, 512, tmp, buf);
}

#endif /* __SH_MMCIF_H__ */