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Commit 51a012b7 authored by Tim Harvey's avatar Tim Harvey Committed by Shawn Guo
Browse files

ARM: dts: imx: ventana: Add ext watchdog reset



bc677ff4 adds a device-tree property
to specify that an external watchdog reset is used to reset other
portions of the board and not just the IMX6 SoC.

This adds the property to the proper watchdog as well as the pinmux for
the Gateworks Ventana boards that use this external watchdog reset to
reset the PMIC which will reset all the PMIC power rails and not just
a chip-level IMX6 reset. This helps to work around various system issues
that can cause a hang when coming out of reset.

Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 29b4817d
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+12 −0
Original line number Diff line number Diff line
@@ -228,6 +228,12 @@
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	imx6qdl-gw51xx {
		pinctrl_enet: enetgrp {
@@ -364,5 +370,11 @@
				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* OTG_PWR_EN */
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
			>;
		};
	};
};
+12 −0
Original line number Diff line number Diff line
@@ -353,6 +353,12 @@
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	imx6qdl-gw52xx {
		pinctrl_audmux: audmuxgrp {
@@ -549,5 +555,11 @@
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
			>;
		};
	};
};
+12 −0
Original line number Diff line number Diff line
@@ -351,6 +351,12 @@
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	imx6qdl-gw53xx {
		pinctrl_audmux: audmuxgrp {
@@ -539,5 +545,11 @@
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
			>;
		};
	};
};
+17 −0
Original line number Diff line number Diff line
@@ -453,6 +453,17 @@
	status = "okay";
};

&wdog1 {
	status = "disabled";
};

&wdog2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&iomuxc {
	imx6qdl-gw54xx {
		pinctrl_audmux: audmuxgrp {
@@ -654,5 +665,11 @@
				MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_SD1_DAT3__WDOG2_B		0x1b0b0
			>;
		};
	};
};
+12 −0
Original line number Diff line number Diff line
@@ -239,6 +239,12 @@
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
};

&iomuxc {
	imx6qdl-gw51xx {
		pinctrl_flexcan1: flexcan1grp {
@@ -333,5 +339,11 @@
				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
			>;
		};
	};
};
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