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Commit 50b4b9c3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC fixes from Olof Johansson:
 "Another week, another batch of fixes for arm-soc platforms.

  Nothing controversial here, a handful of fixes for regressions and/or
  serious problems across several of the platforms.  Things are slowing
  down nicely on fix rates for 3.10"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
  ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
  ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
  sh-pfc: r8a7779: Don't group USB OVC and PENC pins
  ARM: mxs: icoll: Fix interrupts gpio bank 0
  ARM: imx: clk-imx6q: AXI clock select index is incorrect
  ARM: bcm2835: override the HW UART periphid
  ARM: mvebu: Fix bug in coherency fabric low level init function
  ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
  ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
  ARM: ux500: Only configure wake-up reasons on ux500 based platforms
  ARM: dts: imx: fix clocks for cspi
  ARM i.MX6q: fix for ldb_di_sels
parents 554e6e9f 090878aa

arch/arm/boot/dts/bcm2835.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 
			reg = <0x7e201000 0x1000>;

			interrupts = <2 25>;

			clock-frequency = <3000000>;

			arm,primecell-periphid = <0x00241011>;

		};



		gpio: gpio {

arch/arm/boot/dts/imx25.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -141,8 +141,8 @@ 
				#size-cells = <0>;

				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";

				reg = <0x43fa4000 0x4000>;

				clocks = <&clks 62>;

				clock-names = "ipg";

				clocks = <&clks 62>, <&clks 62>;

				clock-names = "ipg", "per";

				interrupts = <14>;

				status = "disabled";

			};
@@ -182,8 +182,8 @@ 
				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";

				reg = <0x50004000 0x4000>;

				interrupts = <0>;

				clocks = <&clks 80>;

				clock-names = "ipg";

				clocks = <&clks 80>, <&clks 80>;

				clock-names = "ipg", "per";

				status = "disabled";

			};
@@ -210,8 +210,8 @@ 
				#size-cells = <0>;

				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";

				reg = <0x50010000 0x4000>;

				clocks = <&clks 79>;

				clock-names = "ipg";

				clocks = <&clks 79>, <&clks 79>;

				clock-names = "ipg", "per";

				interrupts = <13>;

				status = "disabled";

			};

arch/arm/boot/dts/imx27.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ 
				compatible = "fsl,imx27-cspi";

				reg = <0x1000e000 0x1000>;

				interrupts = <16>;

				clocks = <&clks 53>, <&clks 0>;

				clocks = <&clks 53>, <&clks 53>;

				clock-names = "ipg", "per";

				status = "disabled";

			};
@@ -142,7 +142,7 @@ 
				compatible = "fsl,imx27-cspi";

				reg = <0x1000f000 0x1000>;

				interrupts = <15>;

				clocks = <&clks 52>, <&clks 0>;

				clocks = <&clks 52>, <&clks 52>;

				clock-names = "ipg", "per";

				status = "disabled";

			};
@@ -223,7 +223,7 @@ 
				compatible = "fsl,imx27-cspi";

				reg = <0x10017000 0x1000>;

				interrupts = <6>;

				clocks = <&clks 51>, <&clks 0>;

				clocks = <&clks 51>, <&clks 51>;

				clock-names = "ipg", "per";

				status = "disabled";

			};

arch/arm/boot/dts/imx51.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -631,7 +631,7 @@ 
				compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";

				reg = <0x83fc0000 0x4000>;

				interrupts = <38>;

				clocks = <&clks 55>, <&clks 0>;

				clocks = <&clks 55>, <&clks 55>;

				clock-names = "ipg", "per";

				status = "disabled";

			};

arch/arm/boot/dts/imx53.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -714,7 +714,7 @@ 
				compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";

				reg = <0x63fc0000 0x4000>;

				interrupts = <38>;

				clocks = <&clks 55>, <&clks 0>;

				clocks = <&clks 55>, <&clks 55>;

				clock-names = "ipg", "per";

				status = "disabled";

			};