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Commit 50686e8a authored by Linus Torvalds's avatar Linus Torvalds
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Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...
parents c5fc2498 1ec6f701
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+5 −0
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@@ -90,6 +90,11 @@ the Atmel website: http://www.atmel.com.
        + Datasheet
          http://www.atmel.com/Images/Atmel-11238-32-bit-Cortex-A5-Microcontroller-SAMA5D4_Datasheet.pdf

      - sama5d2 family
        - sama5d27
        + Datasheet
          Coming soon


Linux kernel information
------------------------
+2 −0
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@@ -27,6 +27,8 @@ compatible: must be one of:
    o "atmel,at91sam9xe"
 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
   SoC family:
    o "atmel,sama5d2" shall be extended with the specific SoC compatible:
       - "atmel,sama5d27"
    o "atmel,sama5d3" shall be extended with the specific SoC compatible:
       - "atmel,sama5d31"
       - "atmel,sama5d33"
+78 −13
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@@ -305,12 +305,13 @@ Secure Non-Volatile Storage (SNVS) Node
    Node defines address range and the associated
    interrupt for the SNVS function.  This function
    monitors security state information & reports
    security violations.
    security violations. This also included rtc,
    system power off and ON/OFF key.

  - compatible
      Usage: required
      Value type: <string>
      Definition: Must include "fsl,sec-v4.0-mon".
      Definition: Must include "fsl,sec-v4.0-mon" and "syscon".

  - reg
      Usage: required
@@ -341,7 +342,7 @@ Secure Non-Volatile Storage (SNVS) Node
           the child address, parent address, & length.

   - interrupts
      Usage: required
      Usage: optional
      Value type: <prop_encoded-array>
      Definition:  Specifies the interrupts generated by this
           device.  The value of the interrupts property
@@ -358,7 +359,7 @@ Secure Non-Volatile Storage (SNVS) Node

EXAMPLE
	sec_mon@314000 {
		compatible = "fsl,sec-v4.0-mon";
		compatible = "fsl,sec-v4.0-mon", "syscon";
		reg = <0x314000 0x1000>;
		ranges = <0 0x314000 0x1000>;
		interrupt-parent = <&mpic>;
@@ -375,16 +376,72 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
      Value type: <string>
      Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".

  - reg
  - interrupts
      Usage: required
      Value type: <prop-encoded-array>
      Definition: A standard property.  Specifies the physical
          address and length of the SNVS LP configuration registers.
      Value type: <prop_encoded-array>
      Definition: Specifies the interrupts generated by this
	   device.  The value of the interrupts property
	   consists of one interrupt specifier. The format
	   of the specifier is defined by the binding document
	   describing the node's interrupt parent.

 - regmap
	Usage: required
	Value type: <phandle>
	Definition: this is phandle to the register map node.

 - offset
	Usage: option
	value type: <u32>
	Definition: LP register offset. default it is 0x34.

EXAMPLE
	sec_mon_rtc_lp@314000 {
	sec_mon_rtc_lp@1 {
		compatible = "fsl,sec-v4.0-mon-rtc-lp";
		reg = <0x34 0x58>;
		interrupts = <93 2>;
		regmap = <&snvs>;
		offset = <0x34>;
	};

=====================================================================
System ON/OFF key driver

  The snvs-pwrkey is designed to enable POWER key function which controlled
  by SNVS ONOFF, the driver can report the status of POWER key and wakeup
  system if pressed after system suspend.

  - compatible:
      Usage: required
      Value type: <string>
      Definition: Mush include "fsl,sec-v4.0-pwrkey".

  - interrupts:
      Usage: required
      Value type: <prop_encoded-array>
      Definition: The SNVS ON/OFF interrupt number to the CPU(s).

  - linux,keycode:
      Usage: option
      Value type: <int>
      Definition: Keycode to emit, KEY_POWER by default.

  - wakeup-source:
      Usage: option
      Value type: <boo>
      Definition: Button can wake-up the system.

 - regmap:
      Usage: required:
      Value type: <phandle>
      Definition: this is phandle to the register map node.

EXAMPLE:
	snvs-pwrkey@0x020cc000 {
		compatible = "fsl,sec-v4.0-pwrkey";
		regmap = <&snvs>;
		interrupts = <0 4 0x4>
	        linux,keycode = <116>; /* KEY_POWER */
		wakeup;
	};

=====================================================================
@@ -460,12 +517,20 @@ FULL EXAMPLE
		compatible = "fsl,sec-v4.0-mon";
		reg = <0x314000 0x1000>;
		ranges = <0 0x314000 0x1000>;
		interrupt-parent = <&mpic>;
		interrupts = <93 2>;

		sec_mon_rtc_lp@34 {
			compatible = "fsl,sec-v4.0-mon-rtc-lp";
			reg = <0x34 0x58>;
			regmap = <&sec_mon>;
			offset = <0x34>;
			interrupts = <93 2>;
		};

		snvs-pwrkey@0x020cc000 {
			compatible = "fsl,sec-v4.0-pwrkey";
			regmap = <&sec_mon>;
			interrupts = <0 4 0x4>;
			linux,keycode = <116>; /* KEY_POWER */
			wakeup;
		};
	};

+1 −0
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See Documentation/devicetree/bindings/crypto/fsl-sec4.txt
+26 −0
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* Real Time Clock of the i.MX SoCs

RTC controller for the i.MX SoCs

Required properties:
- compatible: Should be "fsl,imx1-rtc" or "fsl,imx21-rtc".
- reg: physical base address of the controller and length of memory mapped
  region.
- interrupts: IRQ line for the RTC.
- clocks: should contain two entries:
  * one for the input reference
  * one for the the SoC RTC
- clock-names: should contain:
  * "ref" for the input reference clock
  * "ipg" for the SoC RTC clock

Example:

rtc@10007000 {
	compatible = "fsl,imx21-rtc";
	reg = <0x10007000 0x1000>;
	interrupts = <22>;
	clocks = <&clks IMX27_CLK_CKIL>,
		 <&clks IMX27_CLK_RTC_IPG_GATE>;
	clock-names = "ref", "ipg";
};
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