Commit 505c7de5 authored Jul 13, 2011 by Laurent Pinchart

fbdev: sh_mobile_lcdc: Compute clock pattern using divider denominator

The clock divider pattern is computed based on the dot clock register
value which stores the divider denumerator. However, when using a 1:1
divider ratio, the register is programmed with a value that must not be
interpreted as a denominator. This results in a shift left operation
with a value of 32, which produces undefined behaviour.

Compute the clock pattern using the divider denominator, not the dot
clock register value.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

parent dc48665f

drivers/video/sh_mobile_lcdcfb.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -481,13 +481,15 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
		if (!m)
		continue;

		/* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
		* denominator.
		*/
		lcdc_write_chan(ch, LDDCKPAT1R, 0);
		lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);

		if (m == 1)
		m = LDDCKR_MOSEL;
		tmp \|= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);

		/* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */
		lcdc_write_chan(ch, LDDCKPAT1R, 0);
		lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
		}

		lcdc_write(priv, _LDDCKR, tmp);