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Commit 4ffe18c2 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'pm-cpufreq'

* pm-cpufreq: (53 commits)
  cpufreq: speedstep-lib: Use monotonic clock
  cpufreq: powernv: Increase the verbosity of OCC console messages
  cpufreq: sfi: use kmemdup rather than duplicating its implementation
  cpufreq: drop !cpufreq_driver check from cpufreq_parse_governor()
  cpufreq: rename cpufreq_real_policy as cpufreq_user_policy
  cpufreq: remove redundant 'policy' field from user_policy
  cpufreq: remove redundant 'governor' field from user_policy
  cpufreq: update user_policy.* on success
  cpufreq: use memcpy() to copy policy
  cpufreq: remove redundant CPUFREQ_INCOMPATIBLE notifier event
  cpufreq: mediatek: Add MT8173 cpufreq driver
  dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings
  intel_pstate: append more Oracle OEM table id to vendor bypass list
  intel_pstate: Add SKY-S support
  intel_pstate: Fix possible overflow complained by Coverity
  cpufreq: Correct a freq check in cpufreq_set_policy()
  cpufreq: Lock CPU online/offline in cpufreq_register_driver()
  cpufreq: Replace recover_policy with new_policy in cpufreq_online()
  cpufreq: Separate CPU device registration from CPU online
  cpufreq: powernv: Restore cpu frequency to policy->cur on unthrottling
  ...
parents 49801251 72e624de
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+2 −5
Original line number Diff line number Diff line
@@ -55,16 +55,13 @@ transition notifiers.
----------------------------

These are notified when a new policy is intended to be set. Each
CPUFreq policy notifier is called three times for a policy transition:
CPUFreq policy notifier is called twice for a policy transition:

1.) During CPUFREQ_ADJUST all CPUFreq notifiers may change the limit if
    they see a need for this - may it be thermal considerations or
    hardware limitations.

2.) During CPUFREQ_INCOMPATIBLE only changes may be done in order to avoid
    hardware failure.

3.) And during CPUFREQ_NOTIFY all notifiers are informed of the new policy
2.) And during CPUFREQ_NOTIFY all notifiers are informed of the new policy
   - if two hardware drivers failed to agree on a new policy before this
   stage, the incompatible hardware shall be shut down, and the user
   informed of this.
+83 −0
Original line number Diff line number Diff line
Device Tree Clock bindins for CPU DVFS of Mediatek MT8173 SoC

Required properties:
- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
- clock-names: Should contain the following:
	"cpu"		- The multiplexer for clock input of CPU cluster.
	"intermediate"	- A parent of "cpu" clock which is used as "intermediate" clock
			  source (usually MAINPLL) when the original CPU PLL is under
			  transition and not stable yet.
	Please refer to Documentation/devicetree/bindings/clk/clock-bindings.txt for
	generic clock consumer properties.
- proc-supply: Regulator for Vproc of CPU cluster.

Optional properties:
- sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
	       needs to do "voltage tracking" to step by step scale up/down Vproc and
	       Vsram to fit SoC specific needs. When absent, the voltage scaling
	       flow is handled by hardware, hence no software "voltage tracking" is
	       needed.

Example:
--------
	cpu0: cpu@0 {
		device_type = "cpu";
		compatible = "arm,cortex-a53";
		reg = <0x000>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SLEEP_0>;
		clocks = <&infracfg CLK_INFRA_CA53SEL>,
			 <&apmixedsys CLK_APMIXED_MAINPLL>;
		clock-names = "cpu", "intermediate";
	};

	cpu1: cpu@1 {
		device_type = "cpu";
		compatible = "arm,cortex-a53";
		reg = <0x001>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SLEEP_0>;
		clocks = <&infracfg CLK_INFRA_CA53SEL>,
			 <&apmixedsys CLK_APMIXED_MAINPLL>;
		clock-names = "cpu", "intermediate";
	};

	cpu2: cpu@100 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x100>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SLEEP_0>;
		clocks = <&infracfg CLK_INFRA_CA57SEL>,
			 <&apmixedsys CLK_APMIXED_MAINPLL>;
		clock-names = "cpu", "intermediate";
	};

	cpu3: cpu@101 {
		device_type = "cpu";
		compatible = "arm,cortex-a57";
		reg = <0x101>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SLEEP_0>;
		clocks = <&infracfg CLK_INFRA_CA57SEL>,
			 <&apmixedsys CLK_APMIXED_MAINPLL>;
		clock-names = "cpu", "intermediate";
	};

	&cpu0 {
		proc-supply = <&mt6397_vpca15_reg>;
	};

	&cpu1 {
		proc-supply = <&mt6397_vpca15_reg>;
	};

	&cpu2 {
		proc-supply = <&da9211_vcpu_reg>;
		sram-supply = <&mt6397_vsramca7_reg>;
	};

	&cpu3 {
		proc-supply = <&da9211_vcpu_reg>;
		sram-supply = <&mt6397_vsramca7_reg>;
	};
+12 −0
Original line number Diff line number Diff line
@@ -361,6 +361,7 @@ enum opal_msg_type {
	OPAL_MSG_HMI_EVT,
	OPAL_MSG_DPO,
	OPAL_MSG_PRD,
	OPAL_MSG_OCC,
	OPAL_MSG_TYPE_MAX,
};

@@ -700,6 +701,17 @@ struct opal_prd_msg_header {

struct opal_prd_msg;

#define OCC_RESET                       0
#define OCC_LOAD                        1
#define OCC_THROTTLE                    2
#define OCC_MAX_THROTTLE_STATUS         5

struct opal_occ_msg {
	__be64 type;
	__be64 chip;
	__be64 throttle_status;
};

/*
 * SG entries
 *
+2 −4
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@ static int acpi_processor_ppc_notifier(struct notifier_block *nb,
	if (ignore_ppc)
		return 0;

	if (event != CPUFREQ_INCOMPATIBLE)
	if (event != CPUFREQ_ADJUST)
		return 0;

	mutex_lock(&performance_mutex);
@@ -780,9 +780,7 @@ acpi_processor_register_performance(struct acpi_processor_performance

EXPORT_SYMBOL(acpi_processor_register_performance);

void
acpi_processor_unregister_performance(struct acpi_processor_performance
				      *performance, unsigned int cpu)
void acpi_processor_unregister_performance(unsigned int cpu)
{
	struct acpi_processor *pr;

+7 −0
Original line number Diff line number Diff line
@@ -130,6 +130,13 @@ config ARM_KIRKWOOD_CPUFREQ
	  This adds the CPUFreq driver for Marvell Kirkwood
	  SoCs.

config ARM_MT8173_CPUFREQ
	bool "Mediatek MT8173 CPUFreq support"
	depends on ARCH_MEDIATEK && REGULATOR
	select PM_OPP
	help
	  This adds the CPUFreq driver support for Mediatek MT8173 SoC.

config ARM_OMAP2PLUS_CPUFREQ
	bool "TI OMAP2+"
	depends on ARCH_OMAP2PLUS
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