Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4d15c145 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: Use eLLC/LLC by default when available 

DRI clients really should be using MOCS to get fine grained streaming
cache controls. With that note, I *hope* that this patch doesn't improve
performance overwhelmingly, because if it does - it means there is a
problem elsewhere.

In any case, the kernel, and old userspace should get some benefit from
this, so let's do it. eLLC is always a good default, and really not
using it is the special case for MOCS.

References: http://www.intel.com/newsroom/kits/restricted/ha$well!/pdfs/4th_Gen_Intel_Core_PressBriefing_5-29.pdf

 (page 57)

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 59124506

drivers/gpu/drm/i915/i915_gem_gtt.c

+16 −1
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ 
#define HSW_CACHEABILITY_CONTROL(bits)	((((bits) & 0x7) << 1) | \

					 (((bits) & 0x8) << (11 - 3)))

#define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)

#define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)



static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,

				      enum i915_cache_level level)
@@ -109,6 +110,18 @@ static gen6_gtt_pte_t hsw_pte_encode(dma_addr_t addr, 
	return pte;

}



static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,

				      enum i915_cache_level level)

{

	gen6_gtt_pte_t pte = GEN6_PTE_VALID;

	pte |= HSW_PTE_ADDR_ENCODE(addr);



	if (level != I915_CACHE_NONE)

		pte |= HSW_WB_ELLC_LLC_AGE0;



	return pte;

}



static void gen6_write_pdes(struct i915_hw_ppgtt *ppgtt)

{

	struct drm_i915_private *dev_priv = ppgtt->dev->dev_private;
@@ -861,7 +874,9 @@ int i915_gem_gtt_init(struct drm_device *dev) 
	} else {

		gtt->gtt_probe = gen6_gmch_probe;

		gtt->gtt_remove = gen6_gmch_remove;

		if (IS_HASWELL(dev))

		if (IS_HASWELL(dev) && dev_priv->ellc_size)

			gtt->pte_encode = iris_pte_encode;

		else if (IS_HASWELL(dev))

			gtt->pte_encode = hsw_pte_encode;

		else if (IS_VALLEYVIEW(dev))

			gtt->pte_encode = byt_pte_encode;