Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4b89aff9 authored by Rohit Seth's avatar Rohit Seth Committed by Linus Torvalds
Browse files

[PATCH] i386: move phys_proc_id and cpu_core_id to cpuinfo_x86



Move the phys_core_id and cpu_core_id to cpuinfo_x86 structure.  Similar
patch for x86_64 is already accepted by Andi earlier this week.

[akpm@osdl.org: fix warning]
Signed-off-by: default avatarRohit Seth <rohitseth@google.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 7f35bf92
Loading
Loading
Loading
Loading
+3 −3
Original line number Diff line number Diff line
@@ -235,10 +235,10 @@ static void __init init_amd(struct cpuinfo_x86 *c)
			while ((1 << bits) < c->x86_max_cores)
				bits++;
		}
		cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1);
		phys_proc_id[cpu] >>= bits;
		c->cpu_core_id = c->phys_proc_id & ((1<<bits)-1);
		c->phys_proc_id >>= bits;
		printk(KERN_INFO "CPU %d(%d) -> Core %d\n",
		       cpu, c->x86_max_cores, cpu_core_id[cpu]);
		       cpu, c->x86_max_cores, c->cpu_core_id);
	}
#endif

+7 −8
Original line number Diff line number Diff line
@@ -319,7 +319,7 @@ void __cpuinit generic_identify(struct cpuinfo_x86 * c)
	early_intel_workaround(c);

#ifdef CONFIG_X86_HT
	phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
	c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
#endif
}

@@ -477,11 +477,9 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
{
	u32 	eax, ebx, ecx, edx;
	int 	index_msb, core_bits;
	int 	cpu = smp_processor_id();

	cpuid(1, &eax, &ebx, &ecx, &edx);


	if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
		return;

@@ -492,16 +490,17 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
	} else if (smp_num_siblings > 1 ) {

		if (smp_num_siblings > NR_CPUS) {
			printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
			printk(KERN_WARNING "CPU: Unsupported number of the "
					"siblings %d", smp_num_siblings);
			smp_num_siblings = 1;
			return;
		}

		index_msb = get_count_order(smp_num_siblings);
		phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);
		c->phys_proc_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);

		printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
		       phys_proc_id[cpu]);
		       c->phys_proc_id);

		smp_num_siblings = smp_num_siblings / c->x86_max_cores;

@@ -509,12 +508,12 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)

		core_bits = get_count_order(c->x86_max_cores);

		cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) &
		c->cpu_core_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) &
					       ((1 << core_bits) - 1);

		if (c->x86_max_cores > 1)
			printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
			       cpu_core_id[cpu]);
			       c->cpu_core_id);
	}
}
#endif
+2 −2
Original line number Diff line number Diff line
@@ -109,9 +109,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
		seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
#ifdef CONFIG_X86_HT
	if (c->x86_max_cores * smp_num_siblings > 1) {
		seq_printf(m, "physical id\t: %d\n", phys_proc_id[n]);
		seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
		seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n]));
		seq_printf(m, "core id\t\t: %d\n", cpu_core_id[n]);
		seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
		seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
	}
#endif
+5 −11
Original line number Diff line number Diff line
@@ -67,12 +67,6 @@ int smp_num_siblings = 1;
EXPORT_SYMBOL(smp_num_siblings);
#endif

/* Package ID of each logical CPU */
int phys_proc_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID};

/* Core ID of each logical CPU */
int cpu_core_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID};

/* Last level cache ID of each logical CPU */
int cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID};

@@ -473,8 +467,8 @@ set_cpu_sibling_map(int cpu)

	if (smp_num_siblings > 1) {
		for_each_cpu_mask(i, cpu_sibling_setup_map) {
			if (phys_proc_id[cpu] == phys_proc_id[i] &&
			    cpu_core_id[cpu] == cpu_core_id[i]) {
			if (c[cpu].phys_proc_id == c[i].phys_proc_id &&
			    c[cpu].cpu_core_id == c[i].cpu_core_id) {
				cpu_set(i, cpu_sibling_map[cpu]);
				cpu_set(cpu, cpu_sibling_map[i]);
				cpu_set(i, cpu_core_map[cpu]);
@@ -501,7 +495,7 @@ set_cpu_sibling_map(int cpu)
			cpu_set(i, c[cpu].llc_shared_map);
			cpu_set(cpu, c[i].llc_shared_map);
		}
		if (phys_proc_id[cpu] == phys_proc_id[i]) {
		if (c[cpu].phys_proc_id == c[i].phys_proc_id) {
			cpu_set(i, cpu_core_map[cpu]);
			cpu_set(cpu, cpu_core_map[i]);
			/*
@@ -1353,8 +1347,8 @@ remove_siblinginfo(int cpu)
		cpu_clear(cpu, cpu_sibling_map[sibling]);
	cpus_clear(cpu_sibling_map[cpu]);
	cpus_clear(cpu_core_map[cpu]);
	phys_proc_id[cpu] = BAD_APICID;
	cpu_core_id[cpu] = BAD_APICID;
	c[cpu].phys_proc_id = 0;
	c[cpu].cpu_core_id = 0;
	cpu_clear(cpu, cpu_sibling_setup_map);
}

+5 −3
Original line number Diff line number Diff line
@@ -71,8 +71,12 @@ struct cpuinfo_x86 {
	cpumask_t llc_shared_map;	/* cpus sharing the last level cache */
#endif
	unsigned char x86_max_cores;	/* cpuid returned max cores value */
	unsigned char booted_cores;	/* number of cores as seen by OS */
	unsigned char apicid;
#ifdef CONFIG_SMP
	unsigned char booted_cores;	/* number of cores as seen by OS */
	__u8 phys_proc_id; 		/* Physical processor id. */
	__u8 cpu_core_id;  		/* Core id */
#endif
} __attribute__((__aligned__(SMP_CACHE_BYTES)));

#define X86_VENDOR_INTEL 0
@@ -104,8 +108,6 @@ extern struct cpuinfo_x86 cpu_data[];
#define current_cpu_data boot_cpu_data
#endif

extern	int phys_proc_id[NR_CPUS];
extern	int cpu_core_id[NR_CPUS];
extern	int cpu_llc_id[NR_CPUS];
extern char ignore_fpu_irq;

Loading