Loading arch/arm/Kconfig +12 −8 Original line number Diff line number Diff line Loading @@ -85,6 +85,7 @@ choice config ARCH_CLPS7500 bool "Cirrus-CL-PS7500FE" select TIMER_ACORN select ISA config ARCH_CLPS711X bool "CLPS711x/EP721x-based" Loading @@ -96,6 +97,7 @@ config ARCH_CO285 config ARCH_EBSA110 bool "EBSA-110" select ISA help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an onboard Loading @@ -120,13 +122,16 @@ config ARCH_INTEGRATOR config ARCH_IOP3XX bool "IOP3xx-based" select PCI config ARCH_IXP4XX bool "IXP4xx-based" select DMABOUNCE select PCI config ARCH_IXP2000 bool "IXP2400/2800-based" select PCI config ARCH_L7200 bool "LinkUp-L7200" Loading Loading @@ -155,6 +160,8 @@ config ARCH_RPC config ARCH_SA1100 bool "SA1100-based" select ISA select DISCONTIGMEM config ARCH_S3C2410 bool "Samsung S3C2410" Loading @@ -165,6 +172,9 @@ config ARCH_S3C2410 config ARCH_SHARK bool "Shark" select ISA select ISA_DMA select PCI config ARCH_LH7A40X bool "Sharp LH7A40X" Loading Loading @@ -252,8 +262,6 @@ config ARM_AMBA config ISA bool depends on FOOTBRIDGE_HOST || ARCH_SHARK || ARCH_CLPS7500 || ARCH_EBSA110 || ARCH_CDB89712 || ARCH_EDB7211 || ARCH_SA1100 || ARCH_MX1ADS default y help Find out whether you have ISA slots on your motherboard. ISA is the name of a bus system, i.e. the way the CPU talks to the other stuff Loading @@ -263,8 +271,6 @@ config ISA config ISA_DMA bool depends on FOOTBRIDGE_HOST || ARCH_SHARK default y config ISA_DMA_API bool Loading @@ -272,7 +278,6 @@ config ISA_DMA_API config PCI bool "PCI support" if ARCH_INTEGRATOR_AP default y if ARCH_SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_IXP2000 help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside Loading Loading @@ -300,7 +305,7 @@ menu "Kernel Features" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && n depends on EXPERIMENTAL #&& n help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If Loading Loading @@ -340,8 +345,7 @@ config PREEMPT config DISCONTIGMEM bool depends on ARCH_EDB7211 || ARCH_SA1100 || (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) default y default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) help Say Y to support efficient handling of discontiguous physical memory, for architectures which are either NUMA (Non-Uniform Memory Access) Loading arch/arm/kernel/entry-armv.S +5 −9 Original line number Diff line number Diff line Loading @@ -17,8 +17,8 @@ #include <asm/glue.h> #include <asm/vfpmacros.h> #include <asm/hardware.h> @ should be moved into entry-macro.S #include <asm/arch/irqs.h> @ should be moved into entry-macro.S #include <asm/hardware.h> /* should be moved into entry-macro.S */ #include <asm/arch/irqs.h> /* should be moved into entry-macro.S */ #include <asm/arch/entry-macro.S> #include "entry-header.S" Loading Loading @@ -505,9 +505,9 @@ ENTRY(__switch_to) mra r4, r5, acc0 stmia ip, {r4, r5} #endif #ifdef CONFIG_HAS_TLS_REG #if defined(CONFIG_HAS_TLS_REG) mcr p15, 0, r3, c13, c0, 3 @ set TLS register #else #elif !defined(CONFIG_TLS_REG_EMUL) mov r4, #0xffff0fff str r3, [r4, #-15] @ TLS val at 0xffff0ff0 #endif Loading Loading @@ -690,11 +690,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 __kuser_get_tls: @ 0xffff0fe0 #ifndef CONFIG_HAS_TLS_REG #ifdef CONFIG_SMP /* sanity check */ #error "CONFIG_SMP without CONFIG_HAS_TLS_REG is wrong" #endif #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 mov pc, lr Loading arch/arm/kernel/head.S +2 −1 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include <asm/procinfo.h> #include <asm/ptrace.h> #include <asm/constants.h> #include <asm/thread_info.h> #include <asm/system.h> #define PROCINFO_MMUFLAGS 8 Loading Loading @@ -131,7 +132,7 @@ __switch_data: .long processor_id @ r4 .long __machine_arch_type @ r5 .long cr_alignment @ r6 .long init_thread_union+8192 @ sp .long init_thread_union + THREAD_START_SP @ sp /* * The following fragment of code is executed with the MMU on, and uses Loading arch/arm/kernel/process.c +12 −13 Original line number Diff line number Diff line Loading @@ -256,8 +256,6 @@ static unsigned long *thread_info_head; static unsigned int nr_thread_info; #define EXTRA_TASK_STRUCT 4 #define ll_alloc_task_struct() ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) #define ll_free_task_struct(p) free_pages((unsigned long)(p),1) struct thread_info *alloc_thread_info(struct task_struct *task) { Loading @@ -274,17 +272,16 @@ struct thread_info *alloc_thread_info(struct task_struct *task) } if (!thread) thread = ll_alloc_task_struct(); thread = (struct thread_info *) __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); #ifdef CONFIG_MAGIC_SYSRQ #ifdef CONFIG_DEBUG_STACK_USAGE /* * The stack must be cleared if you want SYSRQ-T to * give sensible stack usage information */ if (thread) { char *p = (char *)thread; memzero(p+KERNEL_STACK_SIZE, KERNEL_STACK_SIZE); } if (thread) memzero(thread, THREAD_SIZE); #endif return thread; } Loading @@ -297,7 +294,7 @@ void free_thread_info(struct thread_info *thread) thread_info_head = p; nr_thread_info += 1; } else ll_free_task_struct(thread); free_pages((unsigned long)thread, THREAD_SIZE_ORDER); } /* Loading Loading @@ -350,7 +347,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start, struct thread_info *thread = p->thread_info; struct pt_regs *childregs; childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_SIZE - 8)) - 1; childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_START_SP)) - 1; *childregs = *regs; childregs->ARM_r0 = 0; childregs->ARM_sp = stack_start; Loading Loading @@ -447,15 +444,17 @@ EXPORT_SYMBOL(kernel_thread); unsigned long get_wchan(struct task_struct *p) { unsigned long fp, lr; unsigned long stack_page; unsigned long stack_start, stack_end; int count = 0; if (!p || p == current || p->state == TASK_RUNNING) return 0; stack_page = 4096 + (unsigned long)p->thread_info; stack_start = (unsigned long)(p->thread_info + 1); stack_end = ((unsigned long)p->thread_info) + THREAD_SIZE; fp = thread_saved_fp(p); do { if (fp < stack_page || fp > 4092+stack_page) if (fp < stack_start || fp > stack_end) return 0; lr = pc_pointer (((unsigned long *)fp)[-1]); if (!in_sched_functions(lr)) Loading arch/arm/kernel/sys_arm.c +1 −1 Original line number Diff line number Diff line Loading @@ -302,7 +302,7 @@ long execve(const char *filename, char **argv, char **envp) "b ret_to_user" : : "r" (current_thread_info()), "Ir" (THREAD_SIZE - 8 - sizeof(regs)), "Ir" (THREAD_START_SP - sizeof(regs)), "r" (®s), "Ir" (sizeof(regs)) : "r0", "r1", "r2", "r3", "ip", "memory"); Loading Loading
arch/arm/Kconfig +12 −8 Original line number Diff line number Diff line Loading @@ -85,6 +85,7 @@ choice config ARCH_CLPS7500 bool "Cirrus-CL-PS7500FE" select TIMER_ACORN select ISA config ARCH_CLPS711X bool "CLPS711x/EP721x-based" Loading @@ -96,6 +97,7 @@ config ARCH_CO285 config ARCH_EBSA110 bool "EBSA-110" select ISA help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an onboard Loading @@ -120,13 +122,16 @@ config ARCH_INTEGRATOR config ARCH_IOP3XX bool "IOP3xx-based" select PCI config ARCH_IXP4XX bool "IXP4xx-based" select DMABOUNCE select PCI config ARCH_IXP2000 bool "IXP2400/2800-based" select PCI config ARCH_L7200 bool "LinkUp-L7200" Loading Loading @@ -155,6 +160,8 @@ config ARCH_RPC config ARCH_SA1100 bool "SA1100-based" select ISA select DISCONTIGMEM config ARCH_S3C2410 bool "Samsung S3C2410" Loading @@ -165,6 +172,9 @@ config ARCH_S3C2410 config ARCH_SHARK bool "Shark" select ISA select ISA_DMA select PCI config ARCH_LH7A40X bool "Sharp LH7A40X" Loading Loading @@ -252,8 +262,6 @@ config ARM_AMBA config ISA bool depends on FOOTBRIDGE_HOST || ARCH_SHARK || ARCH_CLPS7500 || ARCH_EBSA110 || ARCH_CDB89712 || ARCH_EDB7211 || ARCH_SA1100 || ARCH_MX1ADS default y help Find out whether you have ISA slots on your motherboard. ISA is the name of a bus system, i.e. the way the CPU talks to the other stuff Loading @@ -263,8 +271,6 @@ config ISA config ISA_DMA bool depends on FOOTBRIDGE_HOST || ARCH_SHARK default y config ISA_DMA_API bool Loading @@ -272,7 +278,6 @@ config ISA_DMA_API config PCI bool "PCI support" if ARCH_INTEGRATOR_AP default y if ARCH_SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_IXP2000 help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside Loading Loading @@ -300,7 +305,7 @@ menu "Kernel Features" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && n depends on EXPERIMENTAL #&& n help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If Loading Loading @@ -340,8 +345,7 @@ config PREEMPT config DISCONTIGMEM bool depends on ARCH_EDB7211 || ARCH_SA1100 || (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) default y default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) help Say Y to support efficient handling of discontiguous physical memory, for architectures which are either NUMA (Non-Uniform Memory Access) Loading
arch/arm/kernel/entry-armv.S +5 −9 Original line number Diff line number Diff line Loading @@ -17,8 +17,8 @@ #include <asm/glue.h> #include <asm/vfpmacros.h> #include <asm/hardware.h> @ should be moved into entry-macro.S #include <asm/arch/irqs.h> @ should be moved into entry-macro.S #include <asm/hardware.h> /* should be moved into entry-macro.S */ #include <asm/arch/irqs.h> /* should be moved into entry-macro.S */ #include <asm/arch/entry-macro.S> #include "entry-header.S" Loading Loading @@ -505,9 +505,9 @@ ENTRY(__switch_to) mra r4, r5, acc0 stmia ip, {r4, r5} #endif #ifdef CONFIG_HAS_TLS_REG #if defined(CONFIG_HAS_TLS_REG) mcr p15, 0, r3, c13, c0, 3 @ set TLS register #else #elif !defined(CONFIG_TLS_REG_EMUL) mov r4, #0xffff0fff str r3, [r4, #-15] @ TLS val at 0xffff0ff0 #endif Loading Loading @@ -690,11 +690,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 __kuser_get_tls: @ 0xffff0fe0 #ifndef CONFIG_HAS_TLS_REG #ifdef CONFIG_SMP /* sanity check */ #error "CONFIG_SMP without CONFIG_HAS_TLS_REG is wrong" #endif #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 mov pc, lr Loading
arch/arm/kernel/head.S +2 −1 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include <asm/procinfo.h> #include <asm/ptrace.h> #include <asm/constants.h> #include <asm/thread_info.h> #include <asm/system.h> #define PROCINFO_MMUFLAGS 8 Loading Loading @@ -131,7 +132,7 @@ __switch_data: .long processor_id @ r4 .long __machine_arch_type @ r5 .long cr_alignment @ r6 .long init_thread_union+8192 @ sp .long init_thread_union + THREAD_START_SP @ sp /* * The following fragment of code is executed with the MMU on, and uses Loading
arch/arm/kernel/process.c +12 −13 Original line number Diff line number Diff line Loading @@ -256,8 +256,6 @@ static unsigned long *thread_info_head; static unsigned int nr_thread_info; #define EXTRA_TASK_STRUCT 4 #define ll_alloc_task_struct() ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) #define ll_free_task_struct(p) free_pages((unsigned long)(p),1) struct thread_info *alloc_thread_info(struct task_struct *task) { Loading @@ -274,17 +272,16 @@ struct thread_info *alloc_thread_info(struct task_struct *task) } if (!thread) thread = ll_alloc_task_struct(); thread = (struct thread_info *) __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); #ifdef CONFIG_MAGIC_SYSRQ #ifdef CONFIG_DEBUG_STACK_USAGE /* * The stack must be cleared if you want SYSRQ-T to * give sensible stack usage information */ if (thread) { char *p = (char *)thread; memzero(p+KERNEL_STACK_SIZE, KERNEL_STACK_SIZE); } if (thread) memzero(thread, THREAD_SIZE); #endif return thread; } Loading @@ -297,7 +294,7 @@ void free_thread_info(struct thread_info *thread) thread_info_head = p; nr_thread_info += 1; } else ll_free_task_struct(thread); free_pages((unsigned long)thread, THREAD_SIZE_ORDER); } /* Loading Loading @@ -350,7 +347,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start, struct thread_info *thread = p->thread_info; struct pt_regs *childregs; childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_SIZE - 8)) - 1; childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_START_SP)) - 1; *childregs = *regs; childregs->ARM_r0 = 0; childregs->ARM_sp = stack_start; Loading Loading @@ -447,15 +444,17 @@ EXPORT_SYMBOL(kernel_thread); unsigned long get_wchan(struct task_struct *p) { unsigned long fp, lr; unsigned long stack_page; unsigned long stack_start, stack_end; int count = 0; if (!p || p == current || p->state == TASK_RUNNING) return 0; stack_page = 4096 + (unsigned long)p->thread_info; stack_start = (unsigned long)(p->thread_info + 1); stack_end = ((unsigned long)p->thread_info) + THREAD_SIZE; fp = thread_saved_fp(p); do { if (fp < stack_page || fp > 4092+stack_page) if (fp < stack_start || fp > stack_end) return 0; lr = pc_pointer (((unsigned long *)fp)[-1]); if (!in_sched_functions(lr)) Loading
arch/arm/kernel/sys_arm.c +1 −1 Original line number Diff line number Diff line Loading @@ -302,7 +302,7 @@ long execve(const char *filename, char **argv, char **envp) "b ret_to_user" : : "r" (current_thread_info()), "Ir" (THREAD_SIZE - 8 - sizeof(regs)), "Ir" (THREAD_START_SP - sizeof(regs)), "r" (®s), "Ir" (sizeof(regs)) : "r0", "r1", "r2", "r3", "ip", "memory"); Loading