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Commit 49cbe786 authored by Eric Miao's avatar Eric Miao
Browse files

[ARM] pxa: add base support for Marvell's PXA168 processor line 

"""The Marvell® PXA168 processor is the first in a family of application
processors targeted at mass market opportunities in computing and consumer
devices. It balances high computing and multimedia performance with low
power consumption to support extended battery life, and includes a wealth
of integrated peripherals to reduce overall BOM cost .... """

See http://www.marvell.com/featured/pxa168.jsp

 for more information.

  1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core,
     there are many enhancements like instructions for flushing the
     whole D-cache, and so on

  2. Clock reuses Russell's common clkdev, and added the basic support
     for UART1/2.

  3. Devices are a bit different from the 'mach-pxa' way, the platform
     devices are now dynamically allocated only when necessary (i.e.
     when pxa_register_device() is called). Description for each device
     are stored in an array of 'struct pxa_device_desc'. Now that:

     a. this array of device description is marked with __initdata and
        can be freed up system is fully up

     b. which means board code has to add all needed devices early in
        his initializing function

     c. platform specific data can now be marked as __initdata since
        they are allocated and copied by platform_device_add_data()

  4. only the basic UART1/2/3 are added, more devices will come later.

Signed-off-by: default avatarJason Chagas <chagas@marvell.com>
Signed-off-by: default avatarEric Miao <eric.miao@marvell.com>
parent f8dec04d

arch/arm/Kconfig

+16 −0
Original line number Diff line number Diff line
@@ -478,6 +478,8 @@ config ARCH_PXA 
	select HAVE_CLK

	select COMMON_CLKDEV

	select ARCH_REQUIRE_GPIOLIB

	select HAVE_CLK

	select COMMON_CLKDEV

	select GENERIC_TIME

	select GENERIC_CLOCKEVENTS

	select TICK_ONESHOT
@@ -485,6 +487,18 @@ config ARCH_PXA 
	help

	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.



config ARCH_MMP

	bool "Marvell PXA168"

	depends on MMU

	select HAVE_CLK

	select COMMON_CLKDEV

	select GENERIC_TIME

	select GENERIC_CLOCKEVENTS

	select TICK_ONESHOT

	select PLAT_PXA

	help

	  Support for Marvell's PXA168 processor line.



config ARCH_RPC

	bool "RiscPC"

	select ARCH_ACORN
@@ -621,6 +635,8 @@ source "arch/arm/mach-mv78xx0/Kconfig" 
source "arch/arm/mach-pxa/Kconfig"

source "arch/arm/plat-pxa/Kconfig"



source "arch/arm/mach-mmp/Kconfig"



source "arch/arm/mach-sa1100/Kconfig"



source "arch/arm/plat-omap/Kconfig"

arch/arm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -109,6 +109,7 @@ ifeq ($(CONFIG_ARCH_SA1100),y) 
 textofs-$(CONFIG_SA1111)	   := 0x00208000

endif

 machine-$(CONFIG_ARCH_PXA)	   := pxa

 machine-$(CONFIG_ARCH_MMP)	   := mmp

    plat-$(CONFIG_PLAT_PXA)	   := pxa

 machine-$(CONFIG_ARCH_L7200)	   := l7200

 machine-$(CONFIG_ARCH_INTEGRATOR) := integrator

arch/arm/boot/compressed/head.S

+12 −0
Original line number Diff line number Diff line
@@ -636,6 +636,18 @@ proc_types: 
		b	__armv4_mmu_cache_off

		b	__armv4_mmu_cache_flush



		.word	0x56158000		@ PXA168

		.word	0xfffff000

		b __armv4_mmu_cache_on

		b __armv4_mmu_cache_off

		b __armv5tej_mmu_cache_flush



		.word	0x56056930

		.word	0xff0ffff0		@ PXA935

		b	__armv4_mmu_cache_on

		b	__armv4_mmu_cache_off

		b	__armv4_mmu_cache_flush



		.word	0x56050000		@ Feroceon

		.word	0xff0f0000

		b	__armv4_mmu_cache_on

arch/arm/include/asm/cacheflush.h

+8 −0
Original line number Diff line number Diff line
@@ -94,6 +94,14 @@ 
# endif

#endif



#if defined(CONFIG_CPU_MOHAWK)

# ifdef _CACHE

#  define MULTI_CACHE 1

# else

#  define _CACHE mohawk

# endif

#endif



#if defined(CONFIG_CPU_FEROCEON)

# define MULTI_CACHE 1

#endif

arch/arm/include/asm/proc-fns.h

+8 −0
Original line number Diff line number Diff line
@@ -185,6 +185,14 @@ 
#   define CPU_NAME cpu_xsc3

#  endif

# endif

# ifdef CONFIG_CPU_MOHAWK

#  ifdef CPU_NAME

#   undef  MULTI_CPU

#   define MULTI_CPU

#  else

#   define CPU_NAME cpu_mohawk

#  endif

# endif

# ifdef CONFIG_CPU_FEROCEON

#  ifdef CPU_NAME

#   undef  MULTI_CPU