Loading arch/arm/boot/compressed/head.S +9 −0 Original line number Diff line number Diff line Loading @@ -674,6 +674,15 @@ proc_types: b __armv4_mmu_cache_off b __armv5tej_mmu_cache_flush #ifdef CONFIG_CPU_FEROCEON_OLD_ID /* this conflicts with the standard ARMv5TE entry */ .long 0x41009260 @ Old Feroceon .long 0xff00fff0 b __armv4_mmu_cache_on b __armv4_mmu_cache_off b __armv5tej_mmu_cache_flush #endif .word 0x66015261 @ FA526 .word 0xff01fff1 b __fa526_cache_on Loading arch/arm/mach-orion5x/addr-map.c +1 −1 Original line number Diff line number Diff line Loading @@ -200,6 +200,6 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size) int __init orion5x_setup_sram_win(void) { return setup_cpu_win(win_alloc_count, ORION5X_SRAM_PHYS_BASE, return setup_cpu_win(win_alloc_count++, ORION5X_SRAM_PHYS_BASE, ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1); } arch/arm/mach-orion5x/common.c +9 −1 Original line number Diff line number Diff line Loading @@ -562,7 +562,7 @@ static struct platform_device orion5x_crypto_device = { .resource = orion5x_crypto_res, }; int __init orion5x_crypto_init(void) static int __init orion5x_crypto_init(void) { int ret; Loading Loading @@ -696,6 +696,14 @@ void __init orion5x_init(void) disable_hlt(); } /* * The 5082/5181l/5182/6082/6082l/6183 have crypto * while 5180n/5181/5281 don't have crypto. */ if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) || dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID) orion5x_crypto_init(); /* * Register watchdog driver */ Loading arch/arm/mach-orion5x/common.h +0 −1 Original line number Diff line number Diff line Loading @@ -38,7 +38,6 @@ void orion5x_spi_init(void); void orion5x_uart0_init(void); void orion5x_uart1_init(void); void orion5x_xor_init(void); int orion5x_crypto_init(void); /* * PCIe/PCI functions. Loading Loading
arch/arm/boot/compressed/head.S +9 −0 Original line number Diff line number Diff line Loading @@ -674,6 +674,15 @@ proc_types: b __armv4_mmu_cache_off b __armv5tej_mmu_cache_flush #ifdef CONFIG_CPU_FEROCEON_OLD_ID /* this conflicts with the standard ARMv5TE entry */ .long 0x41009260 @ Old Feroceon .long 0xff00fff0 b __armv4_mmu_cache_on b __armv4_mmu_cache_off b __armv5tej_mmu_cache_flush #endif .word 0x66015261 @ FA526 .word 0xff01fff1 b __fa526_cache_on Loading
arch/arm/mach-orion5x/addr-map.c +1 −1 Original line number Diff line number Diff line Loading @@ -200,6 +200,6 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size) int __init orion5x_setup_sram_win(void) { return setup_cpu_win(win_alloc_count, ORION5X_SRAM_PHYS_BASE, return setup_cpu_win(win_alloc_count++, ORION5X_SRAM_PHYS_BASE, ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1); }
arch/arm/mach-orion5x/common.c +9 −1 Original line number Diff line number Diff line Loading @@ -562,7 +562,7 @@ static struct platform_device orion5x_crypto_device = { .resource = orion5x_crypto_res, }; int __init orion5x_crypto_init(void) static int __init orion5x_crypto_init(void) { int ret; Loading Loading @@ -696,6 +696,14 @@ void __init orion5x_init(void) disable_hlt(); } /* * The 5082/5181l/5182/6082/6082l/6183 have crypto * while 5180n/5181/5281 don't have crypto. */ if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) || dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID) orion5x_crypto_init(); /* * Register watchdog driver */ Loading
arch/arm/mach-orion5x/common.h +0 −1 Original line number Diff line number Diff line Loading @@ -38,7 +38,6 @@ void orion5x_spi_init(void); void orion5x_uart0_init(void); void orion5x_uart1_init(void); void orion5x_xor_init(void); int orion5x_crypto_init(void); /* * PCIe/PCI functions. Loading