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Commit 4776dbb3 authored by Kukjin Kim's avatar Kukjin Kim
Browse files

Merge tag 'samsung-fixes-4.3' of http://github.com/krzk/linux into v4.3-samsung-fixes 

Fixes for Exynos (DT and mach code):
1. Finally fix booting of all 8 cores on Exynos Octa (Exynos542x): all
   8 cores are booting and can be used. The fix, based on vendor
   code and bootloader behavior, is as for time being only
   for MCPM enabled path.
2. Fix thermal boot issue on SMDK5250.
3. Fix invalid clock used for FIMD IOMMU.
parents 1605b60a c7d2ecd9

arch/arm/boot/dts/exynos5250-smdk5250.dts

+1 −0
Original line number Diff line number Diff line
@@ -197,6 +197,7 @@ 
				regulator-name = "P1.8V_LDO_OUT10";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-always-on;

			};



			ldo11_reg: LDO11 {

arch/arm/boot/dts/exynos5420.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -1117,7 +1117,7 @@ 
		interrupt-parent = <&combiner>;

		interrupts = <3 0>;

		clock-names = "sysmmu", "master";

		clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;

		clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;

		power-domains = <&disp_pd>;

		#iommu-cells = <0>;

	};

arch/arm/mach-exynos/mcpm-exynos.c

+26 −1
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#include <asm/cputype.h>

#include <asm/cp15.h>

#include <asm/mcpm.h>

#include <asm/smp_plat.h>



#include "regs-pmu.h"

#include "common.h"
@@ -70,7 +71,31 @@ static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster) 
		cluster >= EXYNOS5420_NR_CLUSTERS)

		return -EINVAL;



	if (!exynos_cpu_power_state(cpunr)) {

		exynos_cpu_power_up(cpunr);



		/*

		 * This assumes the cluster number of the big cores(Cortex A15)

		 * is 0 and the Little cores(Cortex A7) is 1.

		 * When the system was booted from the Little core,

		 * they should be reset during power up cpu.

		 */

		if (cluster &&

		    cluster == MPIDR_AFFINITY_LEVEL(cpu_logical_map(0), 1)) {

			/*

			 * Before we reset the Little cores, we should wait

			 * the SPARE2 register is set to 1 because the init

			 * codes of the iROM will set the register after

			 * initialization.

			 */

			while (!pmu_raw_readl(S5P_PMU_SPARE2))

				udelay(10);



			pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu),

					EXYNOS_SWRESET);

		}

	}



	return 0;

}

arch/arm/mach-exynos/regs-pmu.h

+6 −0
Original line number Diff line number Diff line
@@ -513,6 +513,12 @@ static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr) 
#define SPREAD_ENABLE						0xF

#define SPREAD_USE_STANDWFI					0xF



#define EXYNOS5420_KFC_CORE_RESET0				BIT(8)

#define EXYNOS5420_KFC_ETM_RESET0				BIT(20)



#define EXYNOS5420_KFC_CORE_RESET(_nr)				\

	((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr))



#define EXYNOS5420_BB_CON1					0x0784

#define EXYNOS5420_BB_SEL_EN					BIT(31)

#define EXYNOS5420_BB_PMOS_EN					BIT(7)