Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4726e0b0 authored by Sagar Kamble's avatar Sagar Kamble Committed by Daniel Vetter
Browse files

drm/i915: Enabling 128x128 and 256x256 ARGB Cursor Support 



With this patch we allow larger cursor planes of sizes 128x128
and 256x256.

v2: Added more precise check on size while setting cursor plane.

v3: Changes related to restructuring cursor size restrictions
and DRM_DEBUG usage.

v4: Indentation related changes for setting cursor control and
implementing DRM_CAP_CURSOR_WIDTH and DRM_CAP_CURSOR_HEIGHT

Testcase: igt/kms_cursor_crc
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: default avatarG, Pallavi <pallavi.g@intel.com>
Signed-off-by: default avatarSagar Kamble <sagar.a.kamble@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c67a17e9

drivers/gpu/drm/i915/i915_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -3553,7 +3553,11 @@ enum punit_power_well { 
/* New style CUR*CNTR flags */

#define   CURSOR_MODE		0x27

#define   CURSOR_MODE_DISABLE   0x00

#define   CURSOR_MODE_128_32B_AX 0x02

#define   CURSOR_MODE_256_32B_AX 0x03

#define   CURSOR_MODE_64_32B_AX 0x07

#define   CURSOR_MODE_128_ARGB_AX ((1 << 5) | CURSOR_MODE_128_32B_AX)

#define   CURSOR_MODE_256_ARGB_AX ((1 << 5) | CURSOR_MODE_256_32B_AX)

#define   CURSOR_MODE_64_ARGB_AX ((1 << 5) | CURSOR_MODE_64_32B_AX)

#define   MCURSOR_PIPE_SELECT	(1 << 28)

#define   MCURSOR_PIPE_A	0x00

drivers/gpu/drm/i915/intel_display.c

+48 −5
Original line number Diff line number Diff line
@@ -7599,10 +7599,26 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) 
	bool visible = base != 0;



	if (intel_crtc->cursor_visible != visible) {

		int16_t width = intel_crtc->cursor_width;

		uint32_t cntl = I915_READ(CURCNTR(pipe));

		if (base) {

			cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);

			cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;

			cntl |= MCURSOR_GAMMA_ENABLE;



			switch (width) {

			case 64:

				cntl |= CURSOR_MODE_64_ARGB_AX;

				break;

			case 128:

				cntl |= CURSOR_MODE_128_ARGB_AX;

				break;

			case 256:

				cntl |= CURSOR_MODE_256_ARGB_AX;

				break;

			default:

				WARN_ON(1);

				return;

			}

			cntl |= pipe << 28; /* Connect to correct pipe */

		} else {

			cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
@@ -7627,10 +7643,25 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base) 
	bool visible = base != 0;



	if (intel_crtc->cursor_visible != visible) {

		int16_t width = intel_crtc->cursor_width;

		uint32_t cntl = I915_READ(CURCNTR_IVB(pipe));

		if (base) {

			cntl &= ~CURSOR_MODE;

			cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;

			cntl |= MCURSOR_GAMMA_ENABLE;

			switch (width) {

			case 64:

				cntl |= CURSOR_MODE_64_ARGB_AX;

				break;

			case 128:

				cntl |= CURSOR_MODE_128_ARGB_AX;

				break;

			case 256:

				cntl |= CURSOR_MODE_256_ARGB_AX;

				break;

			default:

				WARN_ON(1);

				return;

			}

		} else {

			cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);

			cntl |= CURSOR_MODE_DISABLE;
@@ -7726,9 +7757,11 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, 
		goto finish;

	}



	/* Currently we only support 64x64 cursors */

	if (width != 64 || height != 64) {

		DRM_ERROR("we currently only support 64x64 cursors\n");

	/* Check for which cursor types we support */

	if (!((width == 64 && height == 64) ||

			(width == 128 && height == 128 && !IS_GEN2(dev)) ||

			(width == 256 && height == 256 && !IS_GEN2(dev)))) {

		DRM_DEBUG("Cursor dimension not supported\n");

		return -EINVAL;

	}
@@ -10514,6 +10547,16 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) 


	drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);



	if (IS_GEN2(dev)) {

		intel_crtc->max_cursor_width = GEN2_CURSOR_WIDTH;

		intel_crtc->max_cursor_height = GEN2_CURSOR_HEIGHT;

	} else {

		intel_crtc->max_cursor_width = CURSOR_WIDTH;

		intel_crtc->max_cursor_height = CURSOR_HEIGHT;

	}

	dev->mode_config.cursor_width = intel_crtc->max_cursor_width;

	dev->mode_config.cursor_height = intel_crtc->max_cursor_height;



	drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);

	for (i = 0; i < 256; i++) {

		intel_crtc->lut_r[i] = i;

drivers/gpu/drm/i915/intel_drv.h

+7 −0
Original line number Diff line number Diff line
@@ -78,6 +78,12 @@ 
#define MAX_OUTPUTS 6

/* maximum connectors per crtcs in the mode set */



/* Maximum cursor sizes */

#define GEN2_CURSOR_WIDTH 64

#define GEN2_CURSOR_HEIGHT 64

#define CURSOR_WIDTH 256

#define CURSOR_HEIGHT 256



#define INTEL_I2C_BUS_DVO 1

#define INTEL_I2C_BUS_SDVO 2
@@ -367,6 +373,7 @@ struct intel_crtc { 
	uint32_t cursor_addr;

	int16_t cursor_x, cursor_y;

	int16_t cursor_width, cursor_height;

	int16_t max_cursor_width, max_cursor_height;

	bool cursor_visible;



	struct intel_plane_config plane_config;