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Commit 47137c6b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull timer updates from Thomas Gleixner:
 "Nothing really exciting this time:

   - a few fixlets in the NOHZ code

   - a new ARM SoC timer abomination.  One should expect that we have
     enough of them already, but they insist on inventing new ones.

   - the usual bunch of ARM SoC timer updates.  That feels like herding
     cats"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource: arm_arch_timer: Consolidate arch_timer_evtstrm_enable
  clocksource: arm_arch_timer: Enable counter access for 32-bit ARM
  clocksource: arm_arch_timer: Change clocksource name if CP15 unavailable
  clocksource: sirf: Disable counter before re-setting it
  clocksource: cadence_ttc: Add support for 32bit mode
  clocksource: tcb_clksrc: Sanitize IRQ request
  clocksource: arm_arch_timer: Discard unavailable timers correctly
  clocksource: vf_pit_timer: Support shutdown mode
  ARM: meson6: clocksource: Add Meson6 timer support
  ARM: meson: documentation: Add timer documentation
  clocksource: sh_tmu: Document r8a7779 binding
  clocksource: sh_mtu2: Document r7s72100 binding
  clocksource: sh_cmt: Document SoC specific bindings
  timerfd: Remove an always true check
  nohz: Avoid tick's double reprogramming in highres mode
  nohz: Fix spurious periodic tick behaviour in low-res dynticks mode
parents afa3536b 867f667f

Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt

0 → 100644
+15 −0
Original line number Diff line number Diff line 
Amlogic Meson6 SoCs Timer Controller



Required properties:



- compatible : should be "amlogic,meson6-timer"

- reg : Specifies base physical address and size of the registers.

- interrupts : The interrupt of the first timer



Example:



timer@c1109940 {

	compatible = "amlogic,meson6-timer";

	reg = <0xc1109940 0x14>;

	interrupts = <0 10 1>;

};

Documentation/devicetree/bindings/timer/renesas,cmt.txt

+38 −6
Original line number Diff line number Diff line
@@ -11,15 +11,47 @@ datasheets. 


Required Properties:



  - compatible: must contain one of the following.

    - "renesas,cmt-32" for the 32-bit CMT

  - compatible: must contain one or more of the following:

    - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT

		(CMT0)

    - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT

		(CMT0)

    - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT

		(CMT0)

    - "renesas,cmt-32" for all 32-bit CMT without fast clock support

		(CMT0 on sh7372, sh73a0 and r8a7740)

    - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support

		This is a fallback for the above renesas,cmt-32-* entries.



    - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast

		clock support (CMT[234])

    - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast

		clock support (CMT[234])

    - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast

		clock support (CMT[234])

    - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support

		(CMT[234] on sh7372, sh73a0 and r8a7740)

    - "renesas,cmt-48" for the 48-bit CMT

		This is a fallback for the above renesas,cmt-32-fast-* entries.



    - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT

		(CMT1)

    - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT

		(CMT1)

    - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT

		(CMT1)

    - "renesas,cmt-48" for all non-second generation 48-bit CMT

		(CMT1 on sh7372, sh73a0 and r8a7740)

    - "renesas,cmt-48-gen2" for the second generation 48-bit CMT

		This is a fallback for the above renesas,cmt-48-* entries.



    - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT

		(CMT[01])

    - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT

		(CMT[01])

    - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT

		(CMT[01])

    - "renesas,cmt-48-gen2" for all second generation 48-bit CMT

		(CMT[01] on r8a73a4, r8a7790 and r8a7791)

		This is a fallback for the renesas,cmt-48-r8a73a4,

		renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.



  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt-specifier for the timer, one per channel.
@@ -36,7 +68,7 @@ Example: R8A7790 (R-Car H2) CMT0 node 
	them channels 0 and 1 in the documentation.



	cmt0: timer@ffca0000 {

		compatible = "renesas,cmt-48-gen2";

		compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";

		reg = <0 0xffca0000 0 0x1004>;

		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,

			     <0 142 IRQ_TYPE_LEVEL_HIGH>;

Documentation/devicetree/bindings/timer/renesas,mtu2.txt

+5 −2
Original line number Diff line number Diff line
@@ -8,7 +8,10 @@ are independent. The MTU2 hardware supports five channels indexed from 0 to 4. 


Required Properties:



  - compatible: must contain "renesas,mtu2"

  - compatible: must be one or more of the following:

    - "renesas,mtu2-r7s72100" for the r7s72100 MTU2

    - "renesas,mtu2" for any MTU2

      This is a fallback for the above renesas,mtu2-* entries



  - reg: base address and length of the registers block for the timer module.
@@ -26,7 +29,7 @@ Required Properties: 
Example: R7S72100 (RZ/A1H) MTU2 node



	mtu2: timer@fcff0000 {

		compatible = "renesas,mtu2";

		compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";

		reg = <0xfcff0000 0x400>;

		interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,

			     <0 146 IRQ_TYPE_LEVEL_HIGH>,

Documentation/devicetree/bindings/timer/renesas,tmu.txt

+5 −2
Original line number Diff line number Diff line
@@ -8,7 +8,10 @@ are independent. The TMU hardware supports up to three channels. 


Required Properties:



  - compatible: must contain "renesas,tmu"

  - compatible: must contain one or more of the following:

    - "renesas,tmu-r8a7779" for the r8a7779 TMU

    - "renesas,tmu" for any TMU.

      This is a fallback for the above renesas,tmu-* entries



  - reg: base address and length of the registers block for the timer module.
@@ -27,7 +30,7 @@ Optional Properties: 
Example: R8A7779 (R-Car H1) TMU0 node



	tmu0: timer@ffd80000 {

		compatible = "renesas,tmu";

		compatible = "renesas,tmu-r8a7779", "renesas,tmu";

		reg = <0xffd80000 0x30>;

		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,

			     <0 33 IRQ_TYPE_LEVEL_HIGH>,

arch/arm/include/asm/arch_timer.h

+0 −25
Original line number Diff line number Diff line
@@ -99,31 +99,6 @@ static inline void arch_timer_set_cntkctl(u32 cntkctl) 
	asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));

}



static inline void arch_counter_set_user_access(void)

{

	u32 cntkctl = arch_timer_get_cntkctl();



	/* Disable user access to both physical/virtual counters/timers */

	/* Also disable virtual event stream */

	cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN

			| ARCH_TIMER_USR_VT_ACCESS_EN

			| ARCH_TIMER_VIRT_EVT_EN

			| ARCH_TIMER_USR_VCT_ACCESS_EN

			| ARCH_TIMER_USR_PCT_ACCESS_EN);

	arch_timer_set_cntkctl(cntkctl);

}



static inline void arch_timer_evtstrm_enable(int divider)

{

	u32 cntkctl = arch_timer_get_cntkctl();

	cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;

	/* Set the divider and enable virtual event stream */

	cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)

			| ARCH_TIMER_VIRT_EVT_EN;

	arch_timer_set_cntkctl(cntkctl);

	elf_hwcap |= HWCAP_EVTSTRM;

}



#endif



#endif