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Commit 46c64d4b authored by Marek Olšák's avatar Marek Olšák Committed by Dave Airlie
Browse files

drm/radeon/kms: allow rendering while no colorbuffer is set on r300 



Because hardware cannot disable all colorbuffers directly to do depth-only
rendering, a user should:
- disable reading from a colorbuffer in blending
- disable fastfill
- set the color channel mask to 0 to prevent writing to a colorbuffer

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 5ea597f3

drivers/gpu/drm/radeon/r100.c

+4 −0
Original line number Diff line number Diff line
@@ -2881,6 +2881,10 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) 


	for (i = 0; i < track->num_cb; i++) {

		if (track->cb[i].robj == NULL) {

			if (!(track->fastfill || track->color_channel_mask ||

			      track->blend_read_enable)) {

				continue;

			}

			DRM_ERROR("[drm] No buffer for color buffer %d !\n", i);

			return -EINVAL;

		}

drivers/gpu/drm/radeon/r100_track.h

+3 −1
Original line number Diff line number Diff line
@@ -67,13 +67,15 @@ struct r100_cs_track { 
	unsigned			immd_dwords;

	unsigned			num_arrays;

	unsigned			max_indx;

	unsigned			color_channel_mask;

	struct r100_cs_track_array	arrays[11];

	struct r100_cs_track_cb 	cb[R300_MAX_CB];

	struct r100_cs_track_cb 	zb;

	struct r100_cs_track_texture	textures[R300_TRACK_MAX_TEXTURE];

	bool				z_enabled;

	bool                            separate_cube;



	bool				fastfill;

	bool				blend_read_enable;

};



int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);

drivers/gpu/drm/radeon/r300.c

+12 −0
Original line number Diff line number Diff line
@@ -992,6 +992,18 @@ static int r300_packet0_check(struct radeon_cs_parser *p, 
		}

		ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);

		break;

	case 0x4e0c:

		/* RB3D_COLOR_CHANNEL_MASK */

		track->color_channel_mask = idx_value;

		break;

	case 0x4d1c:

		/* ZB_BW_CNTL */

		track->fastfill = !!(idx_value & (1 << 2));

		break;

	case 0x4e04:

		/* RB3D_BLENDCNTL */

		track->blend_read_enable = !!(idx_value & (1 << 2));

		break;

	case 0x4be8:

		/* valid register only on RV530 */

		if (p->rdev->family == CHIP_RV530)