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Commit 468a3208 authored by Neil Armstrong's avatar Neil Armstrong Committed by Mark Brown
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spi: omap2-mcspi: disable other channels CHCONF_FORCE in prepare_message 



Since the "Switch driver to use transfer_one" change, the cs_change
behavior has changed and a channel chip select can still be
asserted when changing channel from a previous last transfer in a
message having the cs_change attribute.

Since there is no sense having multiple chip select being asserted at the
same time, disable all the remaining forced chip selects in a the
prepare_message called right before a spi_transfer_one_message call.
It ignores the current channel configuration in order to keep the
possibility to leave the chip select asserted between messages.

It fixes this bug on a DM8168 SoC ES2.1 Soc and an OMAP4 ES2.1 SoC.
It was hanging all the other channels transfers when a CHCONF_FORCE
is present on the wrong channel.

Fixes: b28cb941 ("spi: omap2-mcspi: Switch driver to use transfer_one")
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: default avatarMichael Welling <mwelling@ieee.org>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 6ff33f39

drivers/spi/spi-omap2-mcspi.c

+28 −0
Original line number Original line Diff line number Diff line
@@ -1217,6 +1217,33 @@ static int omap2_mcspi_work_one(struct omap2_mcspi *mcspi, 
	return status;

	return status;

}

}





static int omap2_mcspi_prepare_message(struct spi_master *master,

				       struct spi_message *msg)

{

	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);

	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;

	struct omap2_mcspi_cs	*cs;



	/* Only a single channel can have the FORCE bit enabled

	 * in its chconf0 register.

	 * Scan all channels and disable them except the current one.

	 * A FORCE can remain from a last transfer having cs_change enabled

	 */

	list_for_each_entry(cs, &ctx->cs, node) {

		if (msg->spi->controller_state == cs)

			continue;



		if ((cs->chconf0 & OMAP2_MCSPI_CHCONF_FORCE)) {

			cs->chconf0 &= ~OMAP2_MCSPI_CHCONF_FORCE;

			writel_relaxed(cs->chconf0,

					cs->base + OMAP2_MCSPI_CHCONF0);

			readl_relaxed(cs->base + OMAP2_MCSPI_CHCONF0);

		}

	}



	return 0;

}



static int omap2_mcspi_transfer_one(struct spi_master *master,

static int omap2_mcspi_transfer_one(struct spi_master *master,

		struct spi_device *spi, struct spi_transfer *t)

		struct spi_device *spi, struct spi_transfer *t)

{

{
@@ -1344,6 +1371,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev) 
	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);

	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);

	master->setup = omap2_mcspi_setup;

	master->setup = omap2_mcspi_setup;

	master->auto_runtime_pm = true;

	master->auto_runtime_pm = true;

	master->prepare_message = omap2_mcspi_prepare_message;

	master->transfer_one = omap2_mcspi_transfer_one;

	master->transfer_one = omap2_mcspi_transfer_one;

	master->set_cs = omap2_mcspi_set_cs;

	master->set_cs = omap2_mcspi_set_cs;

	master->cleanup = omap2_mcspi_cleanup;

	master->cleanup = omap2_mcspi_cleanup;