Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 466caec0 authored by Santosh Shilimkar's avatar Santosh Shilimkar
Browse files

ARM: OMAP4+: Remove un-necessary cacheflush in secondary CPU boot path 



This was borrowed from ARM versatile code with pen_release mechanism but since
OMAP uses hardware register based synchronisation, pen_release stuff was
dropped. Unfortunately the cacheflush wasn't dropped along with it.

Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 4df9c29b

arch/arm/mach-omap2/omap-smp.c

+0 −4
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ 
#include <linux/io.h>

#include <linux/irqchip/arm-gic.h>



#include <asm/cacheflush.h>

#include <asm/smp_scu.h>



#include "omap-secure.h"
@@ -103,9 +102,6 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct * 
	else

		__raw_writel(0x20, base + OMAP_AUX_CORE_BOOT_0);



	flush_cache_all();

	smp_wmb();



	if (!cpu1_clkdm)

		cpu1_clkdm = clkdm_lookup("mpu1_clkdm");