Loading arch/sh/Kconfig +7 −0 Original line number Diff line number Diff line Loading @@ -513,6 +513,13 @@ config SH_PCLK_FREQ This is necessary for determining the reference clock value on platforms lacking an RTC. config SH_CLK_CPG def_bool y config SH_CLK_CPG_LEGACY depends on SH_CLK_CPG def_bool y if !CPU_SUBTYPE_SH7785 config SH_CLK_MD int "CPU Mode Pin Setting" depends on CPU_SH2 Loading arch/sh/boards/board-sh7785lcr.c +20 −2 Original line number Diff line number Diff line Loading @@ -2,12 +2,12 @@ * Renesas Technology Corp. R0P7785LC0011RL Support. * * Copyright (C) 2008 Yoshihiro Shimoda * Copyright (C) 2009 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/sm501.h> Loading @@ -19,8 +19,11 @@ #include <linux/i2c-pca-platform.h> #include <linux/i2c-algo-pca.h> #include <linux/irq.h> #include <asm/heartbeat.h> #include <linux/clk.h> #include <linux/errno.h> #include <mach/sh7785lcr.h> #include <asm/heartbeat.h> #include <asm/clock.h> /* * NOTE: This board has 2 physical memory maps. Loading Loading @@ -273,6 +276,20 @@ void __init init_sh7785lcr_IRQ(void) plat_irq_setup_pins(IRQ_MODE_IRQ3210); } static int sh7785lcr_clk_init(void) { struct clk *clk; int ret; clk = clk_get(NULL, "extal"); if (!clk || IS_ERR(clk)) return PTR_ERR(clk); ret = clk_set_rate(clk, 33333333); clk_put(clk); return ret; } static void sh7785lcr_power_off(void) { unsigned char *p; Loading Loading @@ -309,6 +326,7 @@ static void __init sh7785lcr_setup(char **cmdline_p) static struct sh_machine_vector mv_sh7785lcr __initmv = { .mv_name = "SH7785LCR", .mv_setup = sh7785lcr_setup, .mv_clk_init = sh7785lcr_clk_init, .mv_init_irq = init_sh7785lcr_IRQ, }; arch/sh/include/asm/clock.h +45 −24 Original line number Diff line number Diff line Loading @@ -10,9 +10,9 @@ struct clk; struct clk_ops { void (*init)(struct clk *clk); void (*enable)(struct clk *clk); int (*enable)(struct clk *clk); void (*disable)(struct clk *clk); void (*recalc)(struct clk *clk); unsigned long (*recalc)(struct clk *clk); int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); int (*set_parent)(struct clk *clk, struct clk *parent); long (*round_rate)(struct clk *clk, unsigned long rate); Loading @@ -27,44 +27,46 @@ struct clk { struct clk *parent; struct clk_ops *ops; struct list_head children; struct list_head sibling; /* node for children */ int usecount; unsigned long rate; unsigned long flags; void __iomem *enable_reg; unsigned int enable_bit; unsigned long arch_flags; void *priv; struct dentry *dentry; }; #define CLK_ALWAYS_ENABLED (1 << 0) #define CLK_RATE_PROPAGATES (1 << 1) #define CLK_NEEDS_INIT (1 << 2) struct clk_lookup { struct list_head node; const char *dev_id; const char *con_id; struct clk *clk; }; #define CLK_ENABLE_ON_INIT (1 << 0) /* Should be defined by processor-specific code */ void arch_init_clk_ops(struct clk_ops **, int type); void __deprecated arch_init_clk_ops(struct clk_ops **, int type); int __init arch_clk_init(void); /* arch/sh/kernel/cpu/clock.c */ int clk_init(void); void clk_recalc_rate(struct clk *); unsigned long followparent_recalc(struct clk *); void recalculate_root_clocks(void); void propagate_rate(struct clk *); int clk_reparent(struct clk *child, struct clk *parent); int clk_register(struct clk *); void clk_unregister(struct clk *); static inline int clk_always_enable(const char *id) { struct clk *clk; int ret; clk = clk_get(NULL, id); if (IS_ERR(clk)) return PTR_ERR(clk); ret = clk_enable(clk); if (ret) clk_put(clk); return ret; } /* arch/sh/kernel/cpu/clock-cpg.c */ int __init __deprecated cpg_clk_init(void); /* the exported API, in addition to clk_set_rate */ /** Loading Loading @@ -96,4 +98,23 @@ enum clk_sh_algo_id { IP_N1, }; struct clk_div_mult_table { unsigned int *divisors; unsigned int nr_divisors; unsigned int *multipliers; unsigned int nr_multipliers; }; struct cpufreq_frequency_table; void clk_rate_table_build(struct clk *clk, struct cpufreq_frequency_table *freq_table, int nr_freqs, struct clk_div_mult_table *src_table, unsigned long *bitmap); long clk_rate_table_round(struct clk *clk, struct cpufreq_frequency_table *freq_table, unsigned long rate); #endif /* __ASM_SH_CLOCK_H */ arch/sh/include/asm/machvec.h +2 −0 Original line number Diff line number Diff line Loading @@ -46,6 +46,8 @@ struct sh_machine_vector { void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); void (*mv_ioport_unmap)(void __iomem *); int (*mv_clk_init)(void); }; extern struct sh_machine_vector sh_mv; Loading arch/sh/kernel/cpu/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -17,5 +17,6 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/ obj-$(CONFIG_UBC_WAKEUP) += ubc.o obj-$(CONFIG_SH_ADC) += adc.o obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o obj-y += irq/ init.o clock.o Loading
arch/sh/Kconfig +7 −0 Original line number Diff line number Diff line Loading @@ -513,6 +513,13 @@ config SH_PCLK_FREQ This is necessary for determining the reference clock value on platforms lacking an RTC. config SH_CLK_CPG def_bool y config SH_CLK_CPG_LEGACY depends on SH_CLK_CPG def_bool y if !CPU_SUBTYPE_SH7785 config SH_CLK_MD int "CPU Mode Pin Setting" depends on CPU_SH2 Loading
arch/sh/boards/board-sh7785lcr.c +20 −2 Original line number Diff line number Diff line Loading @@ -2,12 +2,12 @@ * Renesas Technology Corp. R0P7785LC0011RL Support. * * Copyright (C) 2008 Yoshihiro Shimoda * Copyright (C) 2009 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/sm501.h> Loading @@ -19,8 +19,11 @@ #include <linux/i2c-pca-platform.h> #include <linux/i2c-algo-pca.h> #include <linux/irq.h> #include <asm/heartbeat.h> #include <linux/clk.h> #include <linux/errno.h> #include <mach/sh7785lcr.h> #include <asm/heartbeat.h> #include <asm/clock.h> /* * NOTE: This board has 2 physical memory maps. Loading Loading @@ -273,6 +276,20 @@ void __init init_sh7785lcr_IRQ(void) plat_irq_setup_pins(IRQ_MODE_IRQ3210); } static int sh7785lcr_clk_init(void) { struct clk *clk; int ret; clk = clk_get(NULL, "extal"); if (!clk || IS_ERR(clk)) return PTR_ERR(clk); ret = clk_set_rate(clk, 33333333); clk_put(clk); return ret; } static void sh7785lcr_power_off(void) { unsigned char *p; Loading Loading @@ -309,6 +326,7 @@ static void __init sh7785lcr_setup(char **cmdline_p) static struct sh_machine_vector mv_sh7785lcr __initmv = { .mv_name = "SH7785LCR", .mv_setup = sh7785lcr_setup, .mv_clk_init = sh7785lcr_clk_init, .mv_init_irq = init_sh7785lcr_IRQ, };
arch/sh/include/asm/clock.h +45 −24 Original line number Diff line number Diff line Loading @@ -10,9 +10,9 @@ struct clk; struct clk_ops { void (*init)(struct clk *clk); void (*enable)(struct clk *clk); int (*enable)(struct clk *clk); void (*disable)(struct clk *clk); void (*recalc)(struct clk *clk); unsigned long (*recalc)(struct clk *clk); int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); int (*set_parent)(struct clk *clk, struct clk *parent); long (*round_rate)(struct clk *clk, unsigned long rate); Loading @@ -27,44 +27,46 @@ struct clk { struct clk *parent; struct clk_ops *ops; struct list_head children; struct list_head sibling; /* node for children */ int usecount; unsigned long rate; unsigned long flags; void __iomem *enable_reg; unsigned int enable_bit; unsigned long arch_flags; void *priv; struct dentry *dentry; }; #define CLK_ALWAYS_ENABLED (1 << 0) #define CLK_RATE_PROPAGATES (1 << 1) #define CLK_NEEDS_INIT (1 << 2) struct clk_lookup { struct list_head node; const char *dev_id; const char *con_id; struct clk *clk; }; #define CLK_ENABLE_ON_INIT (1 << 0) /* Should be defined by processor-specific code */ void arch_init_clk_ops(struct clk_ops **, int type); void __deprecated arch_init_clk_ops(struct clk_ops **, int type); int __init arch_clk_init(void); /* arch/sh/kernel/cpu/clock.c */ int clk_init(void); void clk_recalc_rate(struct clk *); unsigned long followparent_recalc(struct clk *); void recalculate_root_clocks(void); void propagate_rate(struct clk *); int clk_reparent(struct clk *child, struct clk *parent); int clk_register(struct clk *); void clk_unregister(struct clk *); static inline int clk_always_enable(const char *id) { struct clk *clk; int ret; clk = clk_get(NULL, id); if (IS_ERR(clk)) return PTR_ERR(clk); ret = clk_enable(clk); if (ret) clk_put(clk); return ret; } /* arch/sh/kernel/cpu/clock-cpg.c */ int __init __deprecated cpg_clk_init(void); /* the exported API, in addition to clk_set_rate */ /** Loading Loading @@ -96,4 +98,23 @@ enum clk_sh_algo_id { IP_N1, }; struct clk_div_mult_table { unsigned int *divisors; unsigned int nr_divisors; unsigned int *multipliers; unsigned int nr_multipliers; }; struct cpufreq_frequency_table; void clk_rate_table_build(struct clk *clk, struct cpufreq_frequency_table *freq_table, int nr_freqs, struct clk_div_mult_table *src_table, unsigned long *bitmap); long clk_rate_table_round(struct clk *clk, struct cpufreq_frequency_table *freq_table, unsigned long rate); #endif /* __ASM_SH_CLOCK_H */
arch/sh/include/asm/machvec.h +2 −0 Original line number Diff line number Diff line Loading @@ -46,6 +46,8 @@ struct sh_machine_vector { void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); void (*mv_ioport_unmap)(void __iomem *); int (*mv_clk_init)(void); }; extern struct sh_machine_vector sh_mv; Loading
arch/sh/kernel/cpu/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -17,5 +17,6 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/ obj-$(CONFIG_UBC_WAKEUP) += ubc.o obj-$(CONFIG_SH_ADC) += adc.o obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o obj-y += irq/ init.o clock.o