Loading arch/arm/mach-omap2/id.c +11 −0 Original line number Diff line number Diff line Loading @@ -246,6 +246,17 @@ void __init omap3xxx_check_features(void) omap_features |= OMAP3_HAS_SDRC; /* * am35x fixups: * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as * reserved and therefore return 0 when read. Unfortunately, * OMAP3_CHECK_FEATURE() will interpret some of those zeroes to * mean that a feature is present even though it isn't so clear * the incorrectly set feature bits. */ if (soc_is_am35xx()) omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP); /* * TODO: Get additional info (where applicable) * e.g. Size of L2 cache. Loading arch/arm/mach-omap2/irq.c +1 −0 Original line number Diff line number Diff line Loading @@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->chip.irq_ack = omap_mask_ack_irq; ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_unmask = irq_gc_unmask_enable_reg; ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; ct->regs.enable = INTC_MIR_CLEAR0; ct->regs.disable = INTC_MIR_SET0; Loading arch/arm/mach-omap2/pm34xx.c +1 −0 Original line number Diff line number Diff line Loading @@ -724,6 +724,7 @@ int __init omap3_pm_init(void) ret = request_irq(omap_prcm_event_to_irq("io"), _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io", omap3_pm_init); enable_irq(omap_prcm_event_to_irq("io")); if (ret) { pr_err("pm: Failed to request pm_io irq\n"); Loading arch/arm/mach-omap2/prm2xxx_3xxx.c +11 −3 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> #include <linux/irq.h> #include "common.h" #include <plat/cpu.h> Loading Loading @@ -303,8 +304,15 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask) static int __init omap3xxx_prcm_init(void) { if (cpu_is_omap34xx()) return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); return 0; int ret = 0; if (cpu_is_omap34xx()) { ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); if (!ret) irq_set_status_flags(omap_prcm_event_to_irq("io"), IRQ_NOAUTOEN); } return ret; } subsys_initcall(omap3xxx_prcm_init); Loading
arch/arm/mach-omap2/id.c +11 −0 Original line number Diff line number Diff line Loading @@ -246,6 +246,17 @@ void __init omap3xxx_check_features(void) omap_features |= OMAP3_HAS_SDRC; /* * am35x fixups: * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as * reserved and therefore return 0 when read. Unfortunately, * OMAP3_CHECK_FEATURE() will interpret some of those zeroes to * mean that a feature is present even though it isn't so clear * the incorrectly set feature bits. */ if (soc_is_am35xx()) omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP); /* * TODO: Get additional info (where applicable) * e.g. Size of L2 cache. Loading
arch/arm/mach-omap2/irq.c +1 −0 Original line number Diff line number Diff line Loading @@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->chip.irq_ack = omap_mask_ack_irq; ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_unmask = irq_gc_unmask_enable_reg; ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; ct->regs.enable = INTC_MIR_CLEAR0; ct->regs.disable = INTC_MIR_SET0; Loading
arch/arm/mach-omap2/pm34xx.c +1 −0 Original line number Diff line number Diff line Loading @@ -724,6 +724,7 @@ int __init omap3_pm_init(void) ret = request_irq(omap_prcm_event_to_irq("io"), _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io", omap3_pm_init); enable_irq(omap_prcm_event_to_irq("io")); if (ret) { pr_err("pm: Failed to request pm_io irq\n"); Loading
arch/arm/mach-omap2/prm2xxx_3xxx.c +11 −3 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> #include <linux/irq.h> #include "common.h" #include <plat/cpu.h> Loading Loading @@ -303,8 +304,15 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask) static int __init omap3xxx_prcm_init(void) { if (cpu_is_omap34xx()) return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); return 0; int ret = 0; if (cpu_is_omap34xx()) { ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); if (!ret) irq_set_status_flags(omap_prcm_event_to_irq("io"), IRQ_NOAUTOEN); } return ret; } subsys_initcall(omap3xxx_prcm_init);