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Commit 43efc9ce authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: simplify fake gpu objects 



Reviewed-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent a8eaebc6

drivers/gpu/drm/nouveau/nouveau_drv.h

+3 −5
Original line number Diff line number Diff line
@@ -135,20 +135,19 @@ enum nouveau_flags { 


#define NVOBJ_FLAG_ZERO_ALLOC		(1 << 1)

#define NVOBJ_FLAG_ZERO_FREE		(1 << 2)

#define NVOBJ_FLAG_FAKE			(1 << 3)

struct nouveau_gpuobj {

	struct drm_device *dev;

	struct list_head list;



	struct drm_mm_node *im_pramin;

	struct nouveau_bo *im_backing;

	uint32_t im_backing_start;

	uint32_t *im_backing_suspend;

	int im_bound;



	uint32_t flags;

	int refcount;



	u32 size;

	u32 pinst;

	u32 cinst;

	u64 vinst;
@@ -753,9 +752,8 @@ extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *, 
			      struct nouveau_gpuobj **);

extern void nouveau_gpuobj_ref(struct nouveau_gpuobj *,

			       struct nouveau_gpuobj **);

extern int nouveau_gpuobj_new_fake(struct drm_device *,

				   uint32_t p_offset, uint32_t b_offset,

				   uint32_t size, uint32_t flags,

extern int nouveau_gpuobj_new_fake(struct drm_device *, u32 pinst, u64 vinst,

				   u32 size, u32 flags,

				   struct nouveau_gpuobj **);

extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,

				  uint64_t offset, uint64_t size, int access,

drivers/gpu/drm/nouveau/nouveau_object.c

+23 −47
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan, 
	gpuobj->dev = dev;

	gpuobj->flags = flags;

	gpuobj->refcount = 1;

	gpuobj->size = size;



	list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
@@ -133,25 +134,23 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan, 


	/* calculate the various different addresses for the object */

	if (chan) {

		gpuobj->pinst = gpuobj->im_pramin->start +

				chan->ramin->im_pramin->start;

		gpuobj->pinst = gpuobj->im_pramin->start + chan->ramin->pinst;

		if (dev_priv->card_type < NV_50) {

			gpuobj->cinst = gpuobj->pinst;

		} else {

			gpuobj->cinst = gpuobj->im_pramin->start;

			gpuobj->vinst = gpuobj->im_pramin->start +

					chan->ramin->im_backing_start;

					chan->ramin->vinst;

		}

	} else {

		gpuobj->pinst = gpuobj->im_pramin->start;

		gpuobj->cinst = 0xdeadbeef;

		gpuobj->vinst = gpuobj->im_backing_start;

	}



	if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {

		int i;



		for (i = 0; i < gpuobj->im_pramin->size; i += 4)

		for (i = 0; i < gpuobj->size; i += 4)

			nv_wo32(gpuobj, i, 0);

		engine->instmem.flush(dev);

	}
@@ -237,7 +236,7 @@ nouveau_gpuobj_del(struct nouveau_gpuobj *gpuobj) 
	NV_DEBUG(dev, "gpuobj %p\n", gpuobj);



	if (gpuobj->im_pramin && (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE)) {

		for (i = 0; i < gpuobj->im_pramin->size; i += 4)

		for (i = 0; i < gpuobj->size; i += 4)

			nv_wo32(gpuobj, i, 0);

		engine->instmem.flush(dev);

	}
@@ -245,15 +244,11 @@ nouveau_gpuobj_del(struct nouveau_gpuobj *gpuobj) 
	if (gpuobj->dtor)

		gpuobj->dtor(dev, gpuobj);



	if (gpuobj->im_backing && !(gpuobj->flags & NVOBJ_FLAG_FAKE))

	if (gpuobj->im_backing)

		engine->instmem.clear(dev, gpuobj);



	if (gpuobj->im_pramin) {

		if (gpuobj->flags & NVOBJ_FLAG_FAKE)

			kfree(gpuobj->im_pramin);

		else

	if (gpuobj->im_pramin)

		drm_mm_put_block(gpuobj->im_pramin);

	}



	list_del(&gpuobj->list);
@@ -274,55 +269,36 @@ nouveau_gpuobj_ref(struct nouveau_gpuobj *ref, struct nouveau_gpuobj **ptr) 
}



int

nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset,

			uint32_t b_offset, uint32_t size,

			uint32_t flags, struct nouveau_gpuobj **pgpuobj)

nouveau_gpuobj_new_fake(struct drm_device *dev, u32 pinst, u64 vinst,

			u32 size, u32 flags, struct nouveau_gpuobj **pgpuobj)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_gpuobj *gpuobj = NULL;

	int i;



	NV_DEBUG(dev,

		 "p_offset=0x%08x b_offset=0x%08x size=0x%08x flags=0x%08x\n",

		 p_offset, b_offset, size, flags);

		 "pinst=0x%08x vinst=0x%010llx size=0x%08x flags=0x%08x\n",

		 pinst, vinst, size, flags);



	gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);

	if (!gpuobj)

		return -ENOMEM;

	NV_DEBUG(dev, "gpuobj %p\n", gpuobj);

	gpuobj->dev = dev;

	gpuobj->flags      = flags | NVOBJ_FLAG_FAKE;

	gpuobj->flags = flags;

	gpuobj->refcount = 1;



	list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);



	if (p_offset != ~0) {

		gpuobj->im_pramin = kzalloc(sizeof(struct drm_mm_node),

					    GFP_KERNEL);

		if (!gpuobj->im_pramin) {

			nouveau_gpuobj_ref(NULL, &gpuobj);

			return -ENOMEM;

		}

		gpuobj->im_pramin->start = p_offset;

		gpuobj->im_pramin->size  = size;

	}



	if (b_offset != ~0) {

		gpuobj->im_backing = (struct nouveau_bo *)-1;

		gpuobj->im_backing_start = b_offset;

	}



	gpuobj->pinst = gpuobj->im_pramin->start;

	gpuobj->size  = size;

	gpuobj->pinst = pinst;

	gpuobj->cinst = 0xdeadbeef;

	gpuobj->vinst = gpuobj->im_backing_start;

	gpuobj->vinst = vinst;



	if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {

		for (i = 0; i < gpuobj->im_pramin->size; i += 4)

		for (i = 0; i < gpuobj->size; i += 4)

			nv_wo32(gpuobj, i, 0);

		dev_priv->engine.instmem.flush(dev);

	}



	if (pgpuobj)

	list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);

	*pgpuobj = gpuobj;

	return 0;

}
@@ -830,16 +806,16 @@ nouveau_gpuobj_suspend(struct drm_device *dev) 
	}



	list_for_each_entry(gpuobj, &dev_priv->gpuobj_list, list) {

		if (!gpuobj->im_backing || (gpuobj->flags & NVOBJ_FLAG_FAKE))

		if (!gpuobj->im_backing)

			continue;



		gpuobj->im_backing_suspend = vmalloc(gpuobj->im_pramin->size);

		gpuobj->im_backing_suspend = vmalloc(gpuobj->size);

		if (!gpuobj->im_backing_suspend) {

			nouveau_gpuobj_resume(dev);

			return -ENOMEM;

		}



		for (i = 0; i < gpuobj->im_pramin->size; i += 4)

		for (i = 0; i < gpuobj->size; i += 4)

			gpuobj->im_backing_suspend[i/4] = nv_ro32(gpuobj, i);

	}
@@ -885,7 +861,7 @@ nouveau_gpuobj_resume(struct drm_device *dev) 
		if (!gpuobj->im_backing_suspend)

			continue;



		for (i = 0; i < gpuobj->im_pramin->size; i += 4)

		for (i = 0; i < gpuobj->size; i += 4)

			nv_wo32(gpuobj, i, gpuobj->im_backing_suspend[i/4]);

		dev_priv->engine.instmem.flush(dev);

	}

drivers/gpu/drm/nouveau/nv04_instmem.c

+2 −19
Original line number Diff line number Diff line
@@ -143,43 +143,26 @@ nv04_instmem_takedown(struct drm_device *dev) 
}



int

nv04_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, uint32_t *sz)

nv04_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj,

		      uint32_t *sz)

{

	if (gpuobj->im_backing)

		return -EINVAL;



	return 0;

}



void

nv04_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;



	if (gpuobj && gpuobj->im_backing) {

		if (gpuobj->im_bound)

			dev_priv->engine.instmem.unbind(dev, gpuobj);

		gpuobj->im_backing = NULL;

	}

}



int

nv04_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)

{

	if (!gpuobj->im_pramin || gpuobj->im_bound)

		return -EINVAL;



	gpuobj->im_bound = 1;

	return 0;

}



int

nv04_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)

{

	if (gpuobj->im_bound == 0)

		return -EINVAL;



	gpuobj->im_bound = 0;

	return 0;

}

drivers/gpu/drm/nouveau/nv50_instmem.c

+8 −11
Original line number Diff line number Diff line
@@ -205,8 +205,7 @@ nv50_instmem_init(struct drm_device *dev) 
		/*XXX: double-check this is ok */

		dev_priv->vm_vram_pt[i] = chan->vm_vram_pt[i];



		for (v = 0; v < dev_priv->vm_vram_pt[i]->im_pramin->size;

								v += 4)

		for (v = 0; v < dev_priv->vm_vram_pt[i]->size; v += 4)

			BAR0_WI32(dev_priv->vm_vram_pt[i], v, 0);



		BAR0_WI32(chan->vm_pd, 0x10 + (i*8),
@@ -322,11 +321,11 @@ nv50_instmem_suspend(struct drm_device *dev) 
	struct nouveau_gpuobj *ramin = chan->ramin;

	int i;



	ramin->im_backing_suspend = vmalloc(ramin->im_pramin->size);

	ramin->im_backing_suspend = vmalloc(ramin->size);

	if (!ramin->im_backing_suspend)

		return -ENOMEM;



	for (i = 0; i < ramin->im_pramin->size; i += 4)

	for (i = 0; i < ramin->size; i += 4)

		ramin->im_backing_suspend[i/4] = nv_ri32(dev, i);

	return 0;

}
@@ -340,8 +339,8 @@ nv50_instmem_resume(struct drm_device *dev) 
	struct nouveau_gpuobj *ramin = chan->ramin;

	int i;



	nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, (ramin->im_backing_start >> 16));

	for (i = 0; i < ramin->im_pramin->size; i += 4)

	nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, (ramin->vinst >> 16));

	for (i = 0; i < ramin->size; i += 4)

		BAR0_WI32(ramin, i, ramin->im_backing_suspend[i/4]);

	vfree(ramin->im_backing_suspend);

	ramin->im_backing_suspend = NULL;
@@ -387,9 +386,7 @@ nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, 
		return ret;

	}



	gpuobj->im_backing_start = gpuobj->im_backing->bo.mem.mm_node->start;

	gpuobj->im_backing_start <<= PAGE_SHIFT;



	gpuobj->vinst = gpuobj->im_backing->bo.mem.mm_node->start << PAGE_SHIFT;

	return 0;

}
@@ -424,11 +421,11 @@ nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) 


	pte     = (gpuobj->im_pramin->start >> 12) << 1;

	pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;

	vram    = gpuobj->im_backing_start;

	vram    = gpuobj->vinst;



	NV_DEBUG(dev, "pramin=0x%lx, pte=%d, pte_end=%d\n",

		 gpuobj->im_pramin->start, pte, pte_end);

	NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start);

	NV_DEBUG(dev, "first vram page: 0x%010llx\n", gpuobj->vinst);



	vram |= 1;

	if (dev_priv->vram_sys_base) {

drivers/gpu/drm/nouveau/nvc0_instmem.c

+3 −4
Original line number Diff line number Diff line
@@ -50,8 +50,7 @@ nvc0_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, 
		return ret;

	}



	gpuobj->im_backing_start = gpuobj->im_backing->bo.mem.mm_node->start;

	gpuobj->im_backing_start <<= PAGE_SHIFT;

	gpuobj->vinst = gpuobj->im_backing->bo.mem.mm_node->start << PAGE_SHIFT;

	return 0;

}
@@ -84,11 +83,11 @@ nvc0_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) 


	pte     = gpuobj->im_pramin->start >> 12;

	pte_end = (gpuobj->im_pramin->size >> 12) + pte;

	vram    = gpuobj->im_backing_start;

	vram    = gpuobj->vinst;



	NV_DEBUG(dev, "pramin=0x%lx, pte=%d, pte_end=%d\n",

		 gpuobj->im_pramin->start, pte, pte_end);

	NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start);

	NV_DEBUG(dev, "first vram page: 0x%010llx\n", gpuobj->vinst);



	while (pte < pte_end) {

		nv_wr32(dev, 0x702000 + (pte * 8), (vram >> 8) | 1);