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Commit 4351654e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin 

Pull blackfin update from Bob Liu.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin:
  blackfin: SEC: clean up SEC interrupt initialization
  blackfin: kgdb: call generic_exec_single() directly
  blackfin: anomaly: add anomaly 16000030 for bf5xx
  Blackfin: dpmc: use module_platform_driver macro
  Blackfin: remove unused is_in_rom()
  Blackfin: remove unnecessary prototype for kobjsize()
  Blackfin: twi: Add missing __iomem annotation
  Blackfin: Annotate strnlen_user and strlen_user 'src' parameter with __user
  Blackfin: Annotate clear_user 'to' parameter with __user
  Blackfin: Add missing __user annotations to put_user
  Blackfin: Annotate strncpy_from_user src parameter with __user
  blackfin: Use Kbuild infrastructure for kvm_para.h
  UAPI: (Scripted) Disintegrate arch/blackfin/include/asm
parents 3d9de190 86794b43

arch/blackfin/include/asm/Kbuild

+1 −5
Original line number Diff line number Diff line 
include include/asm-generic/Kbuild.asm



generic-y += auxvec.h

generic-y += bitsperlong.h
@@ -17,6 +16,7 @@ generic-y += ipcbuf.h 
generic-y += irq_regs.h

generic-y += kdebug.h

generic-y += kmap_types.h

generic-y += kvm_para.h

generic-y += local64.h

generic-y += local.h

generic-y += mman.h
@@ -44,7 +44,3 @@ generic-y += ucontext.h 
generic-y += unaligned.h

generic-y += user.h

generic-y += xor.h
 


header-y += bfin_sport.h

header-y += cachectl.h

header-y += fixed_code.h

arch/blackfin/include/asm/bfin_sport.h

+1 −127
Original line number Diff line number Diff line
@@ -5,65 +5,12 @@ 
 *

 * Licensed under the GPL-2 or later.

 */



#ifndef __BFIN_SPORT_H__

#define __BFIN_SPORT_H__



/* Sport mode: it can be set to TDM, i2s or others */

#define NORM_MODE	0x0

#define TDM_MODE	0x1

#define I2S_MODE	0x2

#define NDSO_MODE	0x3



/* Data format, normal, a-law or u-law */

#define NORM_FORMAT	0x0

#define ALAW_FORMAT	0x2

#define ULAW_FORMAT	0x3



/* Function driver which use sport must initialize the structure */

struct sport_config {

	/* TDM (multichannels), I2S or other mode */

	unsigned int mode:3;

	unsigned int polled;	/* use poll instead of irq when set */



	/* if TDM mode is selected, channels must be set */

	int channels;	/* Must be in 8 units */

	unsigned int frame_delay:4;	/* Delay between frame sync pulse and first bit */



	/* I2S mode */

	unsigned int right_first:1;	/* Right stereo channel first */



	/* In mormal mode, the following item need to be set */

	unsigned int lsb_first:1;	/* order of transmit or receive data */

	unsigned int fsync:1;	/* Frame sync required */

	unsigned int data_indep:1;	/* data independent frame sync generated */

	unsigned int act_low:1;	/* Active low TFS */

	unsigned int late_fsync:1;	/* Late frame sync */

	unsigned int tckfe:1;

	unsigned int sec_en:1;	/* Secondary side enabled */



	/* Choose clock source */

	unsigned int int_clk:1;	/* Internal or external clock */



	/* If external clock is used, the following fields are ignored */

	int serial_clk;

	int fsync_clk;



	unsigned int data_format:2;	/* Normal, u-law or a-law */



	int word_len;		/* How length of the word in bits, 3-32 bits */

	int dma_enabled;

};



/* Userspace interface */

#define SPORT_IOC_MAGIC		'P'

#define SPORT_IOC_CONFIG	_IOWR('P', 0x01, struct sport_config)

#define SPORT_IOC_GET_SYSTEMCLOCK         _IOR('P', 0x02, unsigned long)

#define SPORT_IOC_SET_BAUDRATE            _IOW('P', 0x03, unsigned long)



#ifdef __KERNEL__



#include <linux/types.h>

#include <uapi/asm/bfin_sport.h>



/*

 * All Blackfin system MMRs are padded to 32bits even if the register
@@ -122,76 +69,3 @@ struct bfin_snd_platform_data { 
})



#endif
 


/* SPORT_TCR1 Masks */

#define TSPEN		0x0001	/* TX enable */

#define ITCLK		0x0002	/* Internal TX Clock Select */

#define TDTYPE		0x000C	/* TX Data Formatting Select */

#define DTYPE_NORM	0x0000	/* Data Format Normal */

#define DTYPE_ULAW	0x0008	/* Compand Using u-Law */

#define DTYPE_ALAW	0x000C	/* Compand Using A-Law */

#define TLSBIT		0x0010	/* TX Bit Order */

#define ITFS		0x0200	/* Internal TX Frame Sync Select */

#define TFSR		0x0400	/* TX Frame Sync Required Select */

#define DITFS		0x0800	/* Data Independent TX Frame Sync Select */

#define LTFS		0x1000	/* Low TX Frame Sync Select */

#define LATFS		0x2000	/* Late TX Frame Sync Select */

#define TCKFE		0x4000	/* TX Clock Falling Edge Select */



/* SPORT_TCR2 Masks */

#define SLEN		0x001F	/* SPORT TX Word Length (2 - 31) */

#define DP_SLEN(x)	BFIN_DEPOSIT(SLEN, x)

#define EX_SLEN(x)	BFIN_EXTRACT(SLEN, x)

#define TXSE		0x0100	/* TX Secondary Enable */

#define TSFSE		0x0200	/* TX Stereo Frame Sync Enable */

#define TRFST		0x0400	/* TX Right-First Data Order */



/* SPORT_RCR1 Masks */

#define RSPEN		0x0001	/* RX enable */

#define IRCLK		0x0002	/* Internal RX Clock Select */

#define RDTYPE		0x000C	/* RX Data Formatting Select */

/* DTYPE_* defined above */

#define RLSBIT		0x0010	/* RX Bit Order */

#define IRFS		0x0200	/* Internal RX Frame Sync Select */

#define RFSR		0x0400	/* RX Frame Sync Required Select */

#define LRFS		0x1000	/* Low RX Frame Sync Select */

#define LARFS		0x2000	/* Late RX Frame Sync Select */

#define RCKFE		0x4000	/* RX Clock Falling Edge Select */



/* SPORT_RCR2 Masks */

/* SLEN defined above */

#define RXSE		0x0100	/* RX Secondary Enable */

#define RSFSE		0x0200	/* RX Stereo Frame Sync Enable */

#define RRFST		0x0400	/* Right-First Data Order */



/* SPORT_STAT Masks */

#define RXNE		0x0001	/* RX FIFO Not Empty Status */

#define RUVF		0x0002	/* RX Underflow Status */

#define ROVF		0x0004	/* RX Overflow Status */

#define TXF		0x0008	/* TX FIFO Full Status */

#define TUVF		0x0010	/* TX Underflow Status */

#define TOVF		0x0020	/* TX Overflow Status */

#define TXHRE		0x0040	/* TX Hold Register Empty */



/* SPORT_MCMC1 Masks */

#define SP_WOFF		0x03FF	/* Multichannel Window Offset Field */

#define DP_SP_WOFF(x)	BFIN_DEPOSIT(SP_WOFF, x)

#define EX_SP_WOFF(x)	BFIN_EXTRACT(SP_WOFF, x)

#define SP_WSIZE	0xF000	/* Multichannel Window Size Field */

#define DP_SP_WSIZE(x)	BFIN_DEPOSIT(SP_WSIZE, x)

#define EX_SP_WSIZE(x)	BFIN_EXTRACT(SP_WSIZE, x)



/* SPORT_MCMC2 Masks */

#define MCCRM		0x0003	/* Multichannel Clock Recovery Mode */

#define REC_BYPASS	0x0000	/* Bypass Mode (No Clock Recovery) */

#define REC_2FROM4	0x0002	/* Recover 2 MHz Clock from 4 MHz Clock */

#define REC_8FROM16	0x0003	/* Recover 8 MHz Clock from 16 MHz Clock */

#define MCDTXPE		0x0004	/* Multichannel DMA Transmit Packing */

#define MCDRXPE		0x0008	/* Multichannel DMA Receive Packing */

#define MCMEN		0x0010	/* Multichannel Frame Mode Enable */

#define FSDR		0x0080	/* Multichannel Frame Sync to Data Relationship */

#define MFD		0xF000	/* Multichannel Frame Delay */

#define DP_MFD(x)	BFIN_DEPOSIT(MFD, x)

#define EX_MFD(x)	BFIN_EXTRACT(MFD, x)



#endif

arch/blackfin/include/asm/bfin_twi.h

+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ struct bfin_twi_iface { 
	int			cur_msg;

	u16			saved_clkdiv;

	u16			saved_control;

	struct bfin_twi_regs	*regs_base;

	struct bfin_twi_regs __iomem *regs_base;

};



#define DEFINE_TWI_REG(reg_name, reg) \

arch/blackfin/include/asm/fixed_code.h

+2 −28
Original line number Diff line number Diff line
@@ -6,11 +6,11 @@ 
 *

 * Licensed under the GPL-2 or later.

 */



#ifndef __BFIN_ASM_FIXED_CODE_H__

#define __BFIN_ASM_FIXED_CODE_H__



#ifdef __KERNEL__

#include <uapi/asm/fixed_code.h>



#ifndef __ASSEMBLY__

#include <linux/linkage.h>

#include <linux/ptrace.h>
@@ -28,29 +28,3 @@ extern void safe_user_instruction(void); 
extern void sigreturn_stub(void);

#endif

#endif
 


#ifndef CONFIG_PHY_RAM_BASE_ADDRESS

#define CONFIG_PHY_RAM_BASE_ADDRESS	0x0

#endif



#define FIXED_CODE_START	(CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)



#define SIGRETURN_STUB		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)



#define ATOMIC_SEQS_START	(CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)



#define ATOMIC_XCHG32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)

#define ATOMIC_CAS32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)

#define ATOMIC_ADD32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)

#define ATOMIC_SUB32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)

#define ATOMIC_IOR32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)

#define ATOMIC_AND32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)

#define ATOMIC_XOR32		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)



#define ATOMIC_SEQS_END		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)



#define SAFE_USER_INSTRUCTION   (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)



#define FIXED_CODE_END		(CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)



#endif

arch/blackfin/include/asm/kvm_para.h

deleted100644 → 0
+0 −1
Original line number Diff line number Diff line 
#include <asm-generic/kvm_para.h>