Merge master.kernel.org:/home/rmk/linux-2.6-arm

Introduction

------------

  The S3C2410 supports a low-power suspend mode, where the SDRAM is kept

  The S3C24XX supports a low-power suspend mode, where the SDRAM is kept

  in Self-Refresh mode, and all but the essential peripheral blocks are

  powered down. For more information on how this works, please look

  at the S3C2410 datasheets from Samsung.

  at the relevant CPU datasheet from Samsung.

Requirements

  Note, the original method of adding an late_initcall() is wrong,

  and will end up initialising all compiled machines' pm init!

  The following is an example of code used for testing wakeup from

  an falling edge on IRQ_EINT0:

static irqreturn_t button_irq(int irq, void *pw)

{

	return IRQ_HANDLED;

}

statuc void __init machine_init(void)

{

	...

	request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,

		   "button-irq-eint0", NULL);

	enable_irq_wake(IRQ_EINT0);

	s3c2410_pm_init();

}

Debugging

---------

     care should be taken that any external clock sources that the UARTs

     rely on are still enabled at that point.

  3) If any debugging is placed in the resume path, then it must have the

     relevant clocks and peripherals setup before use (ie, bootloader).

     For example, if you transmit a character from the UART, the baud

     rate and uart controls must be setup beforehand.

Configuration

-------------

    Allows the entire memory to be checksummed before and after the

    suspend to see if there has been any corruption of the contents.

    Note, the time to calculate the CRC is dependant on the CPU speed

    and the size of memory. For an 64Mbyte RAM area on an 200MHz

    S3C2410, this can take approximately 4 seconds to complete.

    This support requires the CRC32 function to be enabled.

config ARCH_EBSA110

	bool "EBSA-110"

	select ISA

	select NO_IOPORT

	help

	  This is an evaluation board for the StrongARM processor available

	  from Digital. It has limited hardware on-board, including an

#include <linux/spi/spi.h>

#include <linux/spi/ads7846.h>

#include <linux/workqueue.h>

#include <linux/delay.h>

#include <asm/hardware.h>

#include <asm/mach-types.h>

static struct spi_board_info nokia770_spi_board_info[] __initdata = {

	[0] = {

		.modalias       = "lcd_lph8923",

		.modalias		= "lcd_mipid",

		.bus_num        = 2,

		.chip_select    = 3,

		.max_speed_hz   = 12000000,

			}

			if (clk->flags & CLOCK_NO_IDLE_PARENT)

				if (!cpu_is_omap24xx())

				omap1_clk_deny_idle(clk->parent);

		}

		if (likely(clk->parent)) {

			omap1_clk_disable(clk->parent);

			if (clk->flags & CLOCK_NO_IDLE_PARENT)

				if (!cpu_is_omap24xx())

				omap1_clk_allow_idle(clk->parent);

		}

	}

	if (unlikely(clk->enable_reg == 0)) {

		printk(KERN_ERR "clock.c: Enable for %s without enable code\n",

		       clk->name);

		return 0;

		return -EINVAL;

	}

	if (clk->flags & ENABLE_REG_32BIT) {

	int crystal_type = 0; /* Default 12 MHz */

	u32 reg;

#ifdef CONFIG_DEBUG_LL

	/* Resets some clocks that may be left on from bootloader,

	 * but leaves serial clocks on.

 	 */

	omap_writel(0x3 << 29, MOD_CONF_CTRL_0);

#endif

	/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */

	reg = omap_readw(SOFT_REQ_REG) & (1 << 4);

	omap_writew(reg, SOFT_REQ_REG);

	if (!cpu_is_omap15xx())

		omap_writew(0, SOFT_REQ_REG2);

	clk_init(&omap1_clk_functions);

	info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);

	if (info != NULL) {

		if (!cpu_is_omap1510())

		if (!cpu_is_omap15xx())

			crystal_type = info->system_clock_type;

	}

	if (cpu_is_omap730())

		omap_unmask_irq(INT_730_IH2_IRQ);

	else if (cpu_is_omap1510())

	else if (cpu_is_omap15xx())

		omap_unmask_irq(INT_1510_IH2_IRQ);

	else if (cpu_is_omap16xx())

		omap_unmask_irq(INT_1610_IH2_IRQ);