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Commit 41e7daf2 authored by Shawn Guo's avatar Shawn Guo Committed by Sascha Hauer
Browse files

arm/imx: remove cpu_is_xxx() from arch_idle() 



This patch adds an idle hook imx_idle to be called in arch_idle().
Any soc that needs a customized idle implementation other than
cpu_do_idle() can set up this hook in soc specific call.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent ddd5f51b

arch/arm/mach-imx/mm-imx3.c

+30 −0
Original line number Diff line number Diff line
@@ -30,6 +30,34 @@ 
#include <mach/iomux-v3.h>

#include <mach/irqs.h>



static void imx3_idle(void)

{

	unsigned long reg = 0;

	__asm__ __volatile__(

		/* disable I and D cache */

		"mrc p15, 0, %0, c1, c0, 0\n"

		"bic %0, %0, #0x00001000\n"

		"bic %0, %0, #0x00000004\n"

		"mcr p15, 0, %0, c1, c0, 0\n"

		/* invalidate I cache */

		"mov %0, #0\n"

		"mcr p15, 0, %0, c7, c5, 0\n"

		/* clear and invalidate D cache */

		"mov %0, #0\n"

		"mcr p15, 0, %0, c7, c14, 0\n"

		/* WFI */

		"mov %0, #0\n"

		"mcr p15, 0, %0, c7, c0, 4\n"

		"nop\n" "nop\n" "nop\n" "nop\n"

		"nop\n" "nop\n" "nop\n"

		/* enable I and D cache */

		"mrc p15, 0, %0, c1, c0, 0\n"

		"orr %0, %0, #0x00001000\n"

		"orr %0, %0, #0x00000004\n"

		"mcr p15, 0, %0, c1, c0, 0\n"

		: "=r" (reg));

}



void imx3_init_l2x0(void)

{

	void __iomem *l2x0_base;
@@ -98,6 +126,7 @@ void __init imx31_init_early(void) 
{

	mxc_set_cpu_type(MXC_CPU_MX31);

	mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));

	imx_idle = imx3_idle;

}



void __init imx35_init_early(void)
@@ -105,6 +134,7 @@ void __init imx35_init_early(void) 
	mxc_set_cpu_type(MXC_CPU_MX35);

	mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));

	mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));

	imx_idle = imx3_idle;

}



void __init mx31_init_irq(void)

arch/arm/mach-imx/pm-imx27.c

+1 −1
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ 
#include <linux/suspend.h>

#include <linux/io.h>

#include <mach/system.h>

#include <mach/mx27.h>

#include <mach/hardware.h>



static int mx27_suspend_enter(suspend_state_t state)

{

arch/arm/mach-mx5/mm.c

+6 −0
Original line number Diff line number Diff line
@@ -21,6 +21,11 @@ 
#include <mach/devices-common.h>

#include <mach/iomux-v3.h>



static void imx5_idle(void)

{

	mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);

}



/*

 * Define the MX51 memory map.

 */
@@ -56,6 +61,7 @@ void __init imx51_init_early(void) 
	mxc_set_cpu_type(MXC_CPU_MX51);

	mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));

	mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));

	imx_idle = imx5_idle;

}



void __init mx53_map_io(void)

arch/arm/mach-mx5/pm-imx5.c

+2 −1
Original line number Diff line number Diff line
@@ -14,7 +14,8 @@ 
#include <linux/err.h>

#include <asm/cacheflush.h>

#include <asm/tlbflush.h>

#include <mach/system.h>

#include <mach/common.h>

#include <mach/hardware.h>

#include "crm_regs.h"



static struct clk *gpc_dvfs_clk;

arch/arm/mach-mx5/system.c

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/platform_device.h>

#include <linux/io.h>

#include <mach/hardware.h>

#include <mach/common.h>

#include "crm_regs.h"



/* set cpu low power mode before WFI instruction. This function is called