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Commit 412bce83 authored by Florian Fainelli's avatar Florian Fainelli Committed by David S. Miller
Browse files

net: systemport: fix UniMAC reset logic 



The UniMAC CMD_SW_RESET bit is not a self-clearing bit, so we need to
assert it, wait a bit and clear it manually. As a result, umac_reset()
is updated not to return any value. The previous version of the code
simply wrote 0 to the CMD register, which would make the busy-waiting
loop exit immediately, having zero effect.

By writing 0 to the CMD register, we were clearing all bits in the CMD
register, and not using the hardware reset default values which are
set on purpose.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3b140a67

drivers/net/ethernet/broadcom/bcmsysport.c

+9 −24
Original line number Diff line number Diff line
@@ -1254,28 +1254,17 @@ static inline void umac_enable_set(struct bcm_sysport_priv *priv, 
		usleep_range(1000, 2000);

}



static inline int umac_reset(struct bcm_sysport_priv *priv)

static inline void umac_reset(struct bcm_sysport_priv *priv)

{

	unsigned int timeout = 0;

	u32 reg;

	int ret = 0;



	umac_writel(priv, 0, UMAC_CMD);

	while (timeout++ < 1000) {

	reg = umac_readl(priv, UMAC_CMD);

		if (!(reg & CMD_SW_RESET))

			break;



		udelay(1);

	}



	if (timeout == 1000) {

		dev_err(&priv->pdev->dev,

			"timeout waiting for MAC to come out of reset\n");

		ret = -ETIMEDOUT;

	}



	return ret;

	reg |= CMD_SW_RESET;

	umac_writel(priv, reg, UMAC_CMD);

	udelay(10);

	reg = umac_readl(priv, UMAC_CMD);

	reg &= ~CMD_SW_RESET;

	umac_writel(priv, reg, UMAC_CMD);

}



static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
@@ -1303,11 +1292,7 @@ static int bcm_sysport_open(struct net_device *dev) 
	int ret;



	/* Reset UniMAC */

	ret = umac_reset(priv);

	if (ret) {

		netdev_err(dev, "UniMAC reset failed\n");

		return ret;

	}

	umac_reset(priv);



	/* Flush TX and RX FIFOs at TOPCTRL level */

	topctrl_flush(priv);