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Commit 40d201af authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2014-09-05' of git://anongit.freedesktop.org/drm-intel into drm-next 

- final bits (again) for the rotation support (Sonika Jindal)
- support bl_power in the intel backlight (Jani)
- vdd handling improvements from Ville
- i830M fixes from Ville
- piles of prep work all over to make skl enabling just plug in (Damien, Sonika)
- rename DP training defines to reflect latest edp standards, this touches all
  drm drivers supporting DP (Sonika Jindal)
- cache edids during single detect cycle to avoid re-reading it for e.g. audio,
  from Chris
- move w/a for registers which are stored in the hw context to the context init
  code (Arun&Damien)
- edp panel power sequencer fixes, helps chv a lot (Ville)
- piles of other chv fixes all over
- much more paranoid pageflip handling with stall detection and better recovery
  from Chris
- small things all over, as usual

* tag 'drm-intel-next-2014-09-05' of git://anongit.freedesktop.org/drm-intel: (114 commits)
  drm/i915: Update DRIVER_DATE to 20140905
  drm/i915: Decouple the stuck pageflip on modeset
  drm/i915: Check for a stalled page flip after each vblank
  drm/i915: Introduce a for_each_plane() macro
  drm/i915: Rewrite ABS_DIFF() in a safer manner
  drm/i915: Add comments explaining the vdd on/off functions
  drm/i915: Move DP port disable to post_disable for pch platforms
  drm/i915: Enable DP port earlier
  drm/i915: Turn on panel power before doing aux transfers
  drm/i915: Be more careful when picking the initial power sequencer pipe
  drm/i915: Reset power sequencer pipe tracking when disp2d is off
  drm/i915: Track which port is using which pipe's power sequencer
  drm/i915: Fix edp vdd locking
  drm/i915: Reset the HEAD pointer for the ring after writing START
  drm/i915: Fix unsafe vma iteration in i915_drop_caches
  drm/i915: init sprites with univeral plane init function
  drm/i915: Check of !HAS_PCH_SPLIT() in PCH transcoder funcs
  drm/i915: Use HAS_GMCH_DISPLAY un underrun reporting code
  drm/i915: Use IS_BROADWELL() instead of IS_GEN8() in forcewake code
  drm/i915: Don't call gen8_fbc_sw_flush() on chv
  ...
parents 29a7d179 a1262495

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -3091,7 +3091,7 @@ F: include/drm/drm_panel.h 
F:	Documentation/devicetree/bindings/panel/



INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)

M:	Daniel Vetter <daniel.vetter@ffwll.ch>

M:	Daniel Vetter <daniel.vetter@intel.com>

M:	Jani Nikula <jani.nikula@linux.intel.com>

L:	intel-gfx@lists.freedesktop.org

L:	dri-devel@lists.freedesktop.org

drivers/gpu/drm/exynos/exynos_dp_core.c

+2 −2
Original line number Diff line number Diff line
@@ -329,8 +329,8 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp) 
		return retval;



	for (lane = 0; lane < lane_count; lane++)

		buf[lane] = DP_TRAIN_PRE_EMPHASIS_0 |

			    DP_TRAIN_VOLTAGE_SWING_400;

		buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 |

			    DP_TRAIN_VOLTAGE_SWING_LEVEL_0;



	retval = exynos_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,

			lane_count, buf);

drivers/gpu/drm/gma500/cdv_intel_dp.c

+2 −2
Original line number Diff line number Diff line
@@ -1089,7 +1089,7 @@ static char *link_train_names[] = { 
};

#endif



#define CDV_DP_VOLTAGE_MAX	    DP_TRAIN_VOLTAGE_SWING_1200

#define CDV_DP_VOLTAGE_MAX	    DP_TRAIN_VOLTAGE_SWING_LEVEL_3

/*

static uint8_t

cdv_intel_dp_pre_emphasis_max(uint8_t voltage_swing)
@@ -1276,7 +1276,7 @@ cdv_intel_dp_set_vswing_premph(struct gma_encoder *encoder, uint8_t signal_level 
		cdv_sb_write(dev, ddi_reg->VSwing2, dp_vswing_premph_table[index]);



	/* ;gfx_dpio_set_reg(0x814c, 0x40802040) */

	if ((vswing + premph) == DP_TRAIN_VOLTAGE_SWING_1200)

	if ((vswing + premph) == DP_TRAIN_VOLTAGE_SWING_LEVEL_3)

		cdv_sb_write(dev, ddi_reg->VSwing3, 0x70802040);

	else

		cdv_sb_write(dev, ddi_reg->VSwing3, 0x40802040);

drivers/gpu/drm/gma500/intel_bios.c

+8 −8
Original line number Diff line number Diff line
@@ -116,30 +116,30 @@ parse_edp(struct drm_psb_private *dev_priv, struct bdb_header *bdb) 


	switch (edp_link_params->preemphasis) {

	case 0:

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;

		break;

	case 1:

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;

		break;

	case 2:

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;

		break;

	case 3:

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;

		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;

		break;

	}

	switch (edp_link_params->vswing) {

	case 0:

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;

		break;

	case 1:

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;

		break;

	case 2:

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;

		break;

	case 3:

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;

		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;

		break;

	}

	DRM_DEBUG_KMS("VBT reports EDP: VSwing  %d, Preemph %d\n",

drivers/gpu/drm/i915/dvo_ns2501.c

+337 −223

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