Loading arch/arc/include/asm/arcregs.h +2 −1 Original line number Diff line number Diff line Loading @@ -299,7 +299,8 @@ struct bcr_generic { */ struct cpuinfo_arc_mmu { unsigned int ver, pg_sz, sets, ways, u_dtlb, u_itlb, num_tlb; unsigned int ver:4, pg_sz_k:8, pad:8, u_dtlb:6, u_itlb:6; unsigned int num_tlb:16, sets:12, ways:4; }; struct cpuinfo_arc_cache { Loading arch/arc/mm/tlb.c +4 −4 Original line number Diff line number Diff line Loading @@ -587,14 +587,14 @@ void read_decode_mmu_bcr(void) if (mmu->ver <= 2) { mmu2 = (struct bcr_mmu_1_2 *)&tmp; mmu->pg_sz = PAGE_SIZE; mmu->pg_sz_k = TO_KB(PAGE_SIZE); mmu->sets = 1 << mmu2->sets; mmu->ways = 1 << mmu2->ways; mmu->u_dtlb = mmu2->u_dtlb; mmu->u_itlb = mmu2->u_itlb; } else { mmu3 = (struct bcr_mmu_3 *)&tmp; mmu->pg_sz = 512 << mmu3->pg_sz; mmu->pg_sz_k = 1 << (mmu3->pg_sz - 1); mmu->sets = 1 << mmu3->sets; mmu->ways = 1 << mmu3->ways; mmu->u_dtlb = mmu3->u_dtlb; Loading @@ -611,7 +611,7 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len) n += scnprintf(buf + n, len - n, "MMU [v%x]\t: %dk PAGE, JTLB %d (%dx%d), uDTLB %d, uITLB %d %s\n", p_mmu->ver, TO_KB(p_mmu->pg_sz), p_mmu->ver, p_mmu->pg_sz_k, p_mmu->num_tlb, p_mmu->sets, p_mmu->ways, p_mmu->u_dtlb, p_mmu->u_itlb, IS_ENABLED(CONFIG_ARC_MMU_SASID) ? ",SASID" : ""); Loading Loading @@ -639,7 +639,7 @@ void arc_mmu_init(void) mmu->ver, CONFIG_ARC_MMU_VER); } if (mmu->pg_sz != PAGE_SIZE) if (mmu->pg_sz_k != TO_KB(PAGE_SIZE)) panic("MMU pg size != PAGE_SIZE (%luk)\n", TO_KB(PAGE_SIZE)); /* Enable the MMU */ Loading Loading
arch/arc/include/asm/arcregs.h +2 −1 Original line number Diff line number Diff line Loading @@ -299,7 +299,8 @@ struct bcr_generic { */ struct cpuinfo_arc_mmu { unsigned int ver, pg_sz, sets, ways, u_dtlb, u_itlb, num_tlb; unsigned int ver:4, pg_sz_k:8, pad:8, u_dtlb:6, u_itlb:6; unsigned int num_tlb:16, sets:12, ways:4; }; struct cpuinfo_arc_cache { Loading
arch/arc/mm/tlb.c +4 −4 Original line number Diff line number Diff line Loading @@ -587,14 +587,14 @@ void read_decode_mmu_bcr(void) if (mmu->ver <= 2) { mmu2 = (struct bcr_mmu_1_2 *)&tmp; mmu->pg_sz = PAGE_SIZE; mmu->pg_sz_k = TO_KB(PAGE_SIZE); mmu->sets = 1 << mmu2->sets; mmu->ways = 1 << mmu2->ways; mmu->u_dtlb = mmu2->u_dtlb; mmu->u_itlb = mmu2->u_itlb; } else { mmu3 = (struct bcr_mmu_3 *)&tmp; mmu->pg_sz = 512 << mmu3->pg_sz; mmu->pg_sz_k = 1 << (mmu3->pg_sz - 1); mmu->sets = 1 << mmu3->sets; mmu->ways = 1 << mmu3->ways; mmu->u_dtlb = mmu3->u_dtlb; Loading @@ -611,7 +611,7 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len) n += scnprintf(buf + n, len - n, "MMU [v%x]\t: %dk PAGE, JTLB %d (%dx%d), uDTLB %d, uITLB %d %s\n", p_mmu->ver, TO_KB(p_mmu->pg_sz), p_mmu->ver, p_mmu->pg_sz_k, p_mmu->num_tlb, p_mmu->sets, p_mmu->ways, p_mmu->u_dtlb, p_mmu->u_itlb, IS_ENABLED(CONFIG_ARC_MMU_SASID) ? ",SASID" : ""); Loading Loading @@ -639,7 +639,7 @@ void arc_mmu_init(void) mmu->ver, CONFIG_ARC_MMU_VER); } if (mmu->pg_sz != PAGE_SIZE) if (mmu->pg_sz_k != TO_KB(PAGE_SIZE)) panic("MMU pg size != PAGE_SIZE (%luk)\n", TO_KB(PAGE_SIZE)); /* Enable the MMU */ Loading