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Commit 40a2ea1b authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'perf/urgent' into perf/core, to pick up fixes before adding more changes 



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents a897b5f0 19667649

.mailmap

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@@ -17,6 +17,7 @@ Aleksey Gorelov <aleksey_gorelov@phoenix.com> 
Al Viro <viro@ftp.linux.org.uk>

Al Viro <viro@zenIV.linux.org.uk>

Andreas Herrmann <aherrman@de.ibm.com>

Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>

Andrew Morton <akpm@linux-foundation.org>

Andrew Vasquez <andrew.vasquez@qlogic.com>

Andy Adamson <andros@citi.umich.edu>

Documentation/devicetree/bindings/arm/cpus.txt

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@@ -199,6 +199,7 @@ nodes to be present and contain the properties described below. 
			    "qcom,kpss-acc-v1"

			    "qcom,kpss-acc-v2"

			    "rockchip,rk3066-smp"

			    "ste,dbx500-smp"



	- cpu-release-addr

		Usage: required for systems that have an "enable-method"

Documentation/devicetree/bindings/dma/apm-xgene-dma.txt

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@@ -35,7 +35,7 @@ Example: 
			device_type = "dma";

			reg = <0x0 0x1f270000 0x0 0x10000>,

			      <0x0 0x1f200000 0x0 0x10000>,

			      <0x0 0x1b008000 0x0 0x2000>,

			      <0x0 0x1b000000 0x0 0x400000>,

			      <0x0 0x1054a000 0x0 0x100>;

			interrupts = <0x0 0x82 0x4>,

				     <0x0 0xb8 0x4>,

Documentation/devicetree/bindings/phy/ti-phy.txt

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@@ -82,6 +82,9 @@ Optional properties: 
 - id: If there are multiple instance of the same type, in order to

   differentiate between each instance "id" can be used (e.g., multi-lane PCIe

   PHY). If "id" is not provided, it is set to default value of '1'.

 - syscon-pllreset: Handle to system control region that contains the

   CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0

   register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.



This is usually a subnode of ocp2scp to which it is connected.
@@ -100,3 +103,16 @@ usb3phy@4a084400 { 
			"sysclk",

			"refclk";

};



sata_phy: phy@4A096000 {

	compatible = "ti,phy-pipe3-sata";

	reg = <0x4A096000 0x80>, /* phy_rx */

	      <0x4A096400 0x64>, /* phy_tx */

	      <0x4A096800 0x40>; /* pll_ctrl */

	reg-names = "phy_rx", "phy_tx", "pll_ctrl";

	ctrl-module = <&omap_control_sata>;

	clocks = <&sys_clkin1>, <&sata_ref_clk>;

	clock-names = "sysclk", "refclk";

	syscon-pllreset = <&scm_conf 0x3fc>;

	#phy-cells = <0>;

};

Documentation/devicetree/bindings/sound/mt8173-max98090.txt

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@@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC 
Required properties:

- compatible : "mediatek,mt8173-max98090"

- mediatek,audio-codec: the phandle of the MAX98090 audio codec

- mediatek,platform: the phandle of MT8173 ASoC platform



Example:



	sound {

		compatible = "mediatek,mt8173-max98090";

		mediatek,audio-codec = <&max98090>;

		mediatek,platform = <&afe>;

	};