Loading Documentation/x86_64/boot-options.txt +10 −2 Original line number Diff line number Diff line Loading @@ -7,10 +7,12 @@ Machine check mce=off disable machine check mce=bootlog Enable logging of machine checks left over from booting. Disabled by default because some BIOS leave bogus ones. Disabled by default on AMD because some BIOS leave bogus ones. If your BIOS doesn't do that it's a good idea to enable though to make sure you log even machine check events that result in a reboot. in a reboot. On Intel systems it is enabled by default. mce=nobootlog Disable boot machine check logging. mce=tolerancelevel (number) 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic, 3: never panic or exit (for testing) Loading Loading @@ -122,6 +124,9 @@ SMP cpumask=MASK only use cpus with bits set in mask additional_cpus=NUM Allow NUM more CPUs for hotplug (defaults are specified by the BIOS or half the available CPUs) NUMA numa=off Only set up a single NUMA node spanning all memory. Loading Loading @@ -188,6 +193,9 @@ Debugging kstack=N Print that many words from the kernel stack in oops dumps. pagefaulttrace Dump all page faults. Only useful for extreme debugging and will create a lot of output. Misc noreplacement Don't replace instructions with more appropiate ones Loading Documentation/x86_64/mm.txt +5 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,7 @@ Virtual memory map with 4 level page tables: 0000000000000000 - 00007fffffffffff (=47bits) user space, different per mm hole caused by [48:63] sign extension ffff800000000000 - ffff80ffffffffff (=40bits) guard hole ffff810000000000 - ffffc0ffffffffff (=46bits) direct mapping of phys. memory ffff810000000000 - ffffc0ffffffffff (=46bits) direct mapping of all phys. memory ffffc10000000000 - ffffc1ffffffffff (=40bits) hole ffffc20000000000 - ffffe1ffffffffff (=45bits) vmalloc/ioremap space ... unused hole ... Loading @@ -14,6 +14,10 @@ ffffffff80000000 - ffffffff82800000 (=40MB) kernel text mapping, from phys 0 ... unused hole ... ffffffff88000000 - fffffffffff00000 (=1919MB) module mapping space The direct mapping covers all memory in the system upto the highest memory address (this means in some cases it can also include PCI memory holes) vmalloc space is lazily synchronized into the different PML4 pages of the processes using the page fault handler, with init_level4_pgt as reference. Loading arch/i386/kernel/acpi/boot.c +8 −9 Original line number Diff line number Diff line Loading @@ -39,17 +39,14 @@ #ifdef CONFIG_X86_64 static inline void acpi_madt_oem_check(char *oem_id, char *oem_table_id) { } extern void __init clustered_apic_check(void); static inline int ioapic_setup_disabled(void) { return 0; } extern int gsi_irq_sharing(int gsi); #include <asm/proto.h> static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return 0; } #else /* X86 */ #ifdef CONFIG_X86_LOCAL_APIC Loading @@ -57,6 +54,8 @@ static inline int ioapic_setup_disabled(void) #include <mach_mpparse.h> #endif /* CONFIG_X86_LOCAL_APIC */ static inline int gsi_irq_sharing(int gsi) { return gsi; } #endif /* X86 */ #define BAD_MADT_ENTRY(entry, end) ( \ Loading Loading @@ -459,7 +458,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) *irq = IO_APIC_VECTOR(gsi); else #endif *irq = gsi; *irq = gsi_irq_sharing(gsi); return 0; } Loading Loading @@ -543,7 +542,7 @@ acpi_scan_rsdp(unsigned long start, unsigned long length) * RSDP signature. */ for (offset = 0; offset < length; offset += 16) { if (strncmp((char *)(start + offset), "RSD PTR ", sig_len)) if (strncmp((char *)(phys_to_virt(start) + offset), "RSD PTR ", sig_len)) continue; return (start + offset); } Loading arch/i386/kernel/cpu/amd.c +6 −6 Original line number Diff line number Diff line Loading @@ -206,9 +206,9 @@ static void __init init_amd(struct cpuinfo_x86 *c) display_cacheinfo(c); if (cpuid_eax(0x80000000) >= 0x80000008) { c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1; if (c->x86_num_cores & (c->x86_num_cores - 1)) c->x86_num_cores = 1; c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1; if (c->x86_max_cores & (c->x86_max_cores - 1)) c->x86_max_cores = 1; } #ifdef CONFIG_X86_HT Loading @@ -217,15 +217,15 @@ static void __init init_amd(struct cpuinfo_x86 *c) * distingush the cores. Assumes number of cores is a power * of two. */ if (c->x86_num_cores > 1) { if (c->x86_max_cores > 1) { int cpu = smp_processor_id(); unsigned bits = 0; while ((1 << bits) < c->x86_num_cores) while ((1 << bits) < c->x86_max_cores) bits++; cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1); phys_proc_id[cpu] >>= bits; printk(KERN_INFO "CPU %d(%d) -> Core %d\n", cpu, c->x86_num_cores, cpu_core_id[cpu]); cpu, c->x86_max_cores, cpu_core_id[cpu]); } #endif } Loading arch/i386/kernel/cpu/common.c +16 −24 Original line number Diff line number Diff line Loading @@ -231,10 +231,10 @@ static void __init early_cpu_detect(void) cpuid(0x00000001, &tfms, &misc, &junk, &cap0); c->x86 = (tfms >> 8) & 15; c->x86_model = (tfms >> 4) & 15; if (c->x86 == 0xf) { if (c->x86 == 0xf) c->x86 += (tfms >> 20) & 0xff; if (c->x86 >= 0x6) c->x86_model += ((tfms >> 16) & 0xF) << 4; } c->x86_mask = tfms & 15; if (cap0 & (1<<19)) c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; Loading Loading @@ -333,7 +333,7 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c) c->x86_model = c->x86_mask = 0; /* So far unknown... */ c->x86_vendor_id[0] = '\0'; /* Unset */ c->x86_model_id[0] = '\0'; /* Unset */ c->x86_num_cores = 1; c->x86_max_cores = 1; memset(&c->x86_capability, 0, sizeof c->x86_capability); if (!have_cpuid_p()) { Loading Loading @@ -443,52 +443,44 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c) void __devinit detect_ht(struct cpuinfo_x86 *c) { u32 eax, ebx, ecx, edx; int index_msb, tmp; int index_msb, core_bits; int cpu = smp_processor_id(); cpuid(1, &eax, &ebx, &ecx, &edx); c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY)) return; cpuid(1, &eax, &ebx, &ecx, &edx); smp_num_siblings = (ebx & 0xff0000) >> 16; if (smp_num_siblings == 1) { printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); } else if (smp_num_siblings > 1 ) { index_msb = 31; if (smp_num_siblings > NR_CPUS) { printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings); smp_num_siblings = 1; return; } tmp = smp_num_siblings; while ((tmp & 0x80000000 ) == 0) { tmp <<=1 ; index_msb--; } if (smp_num_siblings & (smp_num_siblings - 1)) index_msb++; index_msb = get_count_order(smp_num_siblings); phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); printk(KERN_INFO "CPU: Physical Processor ID: %d\n", phys_proc_id[cpu]); smp_num_siblings = smp_num_siblings / c->x86_num_cores; smp_num_siblings = smp_num_siblings / c->x86_max_cores; tmp = smp_num_siblings; index_msb = 31; while ((tmp & 0x80000000) == 0) { tmp <<=1 ; index_msb--; } index_msb = get_count_order(smp_num_siblings) ; if (smp_num_siblings & (smp_num_siblings - 1)) index_msb++; core_bits = get_count_order(c->x86_max_cores); cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) & ((1 << core_bits) - 1); if (c->x86_num_cores > 1) if (c->x86_max_cores > 1) printk(KERN_INFO "CPU: Processor Core ID: %d\n", cpu_core_id[cpu]); } Loading Loading
Documentation/x86_64/boot-options.txt +10 −2 Original line number Diff line number Diff line Loading @@ -7,10 +7,12 @@ Machine check mce=off disable machine check mce=bootlog Enable logging of machine checks left over from booting. Disabled by default because some BIOS leave bogus ones. Disabled by default on AMD because some BIOS leave bogus ones. If your BIOS doesn't do that it's a good idea to enable though to make sure you log even machine check events that result in a reboot. in a reboot. On Intel systems it is enabled by default. mce=nobootlog Disable boot machine check logging. mce=tolerancelevel (number) 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic, 3: never panic or exit (for testing) Loading Loading @@ -122,6 +124,9 @@ SMP cpumask=MASK only use cpus with bits set in mask additional_cpus=NUM Allow NUM more CPUs for hotplug (defaults are specified by the BIOS or half the available CPUs) NUMA numa=off Only set up a single NUMA node spanning all memory. Loading Loading @@ -188,6 +193,9 @@ Debugging kstack=N Print that many words from the kernel stack in oops dumps. pagefaulttrace Dump all page faults. Only useful for extreme debugging and will create a lot of output. Misc noreplacement Don't replace instructions with more appropiate ones Loading
Documentation/x86_64/mm.txt +5 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,7 @@ Virtual memory map with 4 level page tables: 0000000000000000 - 00007fffffffffff (=47bits) user space, different per mm hole caused by [48:63] sign extension ffff800000000000 - ffff80ffffffffff (=40bits) guard hole ffff810000000000 - ffffc0ffffffffff (=46bits) direct mapping of phys. memory ffff810000000000 - ffffc0ffffffffff (=46bits) direct mapping of all phys. memory ffffc10000000000 - ffffc1ffffffffff (=40bits) hole ffffc20000000000 - ffffe1ffffffffff (=45bits) vmalloc/ioremap space ... unused hole ... Loading @@ -14,6 +14,10 @@ ffffffff80000000 - ffffffff82800000 (=40MB) kernel text mapping, from phys 0 ... unused hole ... ffffffff88000000 - fffffffffff00000 (=1919MB) module mapping space The direct mapping covers all memory in the system upto the highest memory address (this means in some cases it can also include PCI memory holes) vmalloc space is lazily synchronized into the different PML4 pages of the processes using the page fault handler, with init_level4_pgt as reference. Loading
arch/i386/kernel/acpi/boot.c +8 −9 Original line number Diff line number Diff line Loading @@ -39,17 +39,14 @@ #ifdef CONFIG_X86_64 static inline void acpi_madt_oem_check(char *oem_id, char *oem_table_id) { } extern void __init clustered_apic_check(void); static inline int ioapic_setup_disabled(void) { return 0; } extern int gsi_irq_sharing(int gsi); #include <asm/proto.h> static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) { return 0; } #else /* X86 */ #ifdef CONFIG_X86_LOCAL_APIC Loading @@ -57,6 +54,8 @@ static inline int ioapic_setup_disabled(void) #include <mach_mpparse.h> #endif /* CONFIG_X86_LOCAL_APIC */ static inline int gsi_irq_sharing(int gsi) { return gsi; } #endif /* X86 */ #define BAD_MADT_ENTRY(entry, end) ( \ Loading Loading @@ -459,7 +458,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) *irq = IO_APIC_VECTOR(gsi); else #endif *irq = gsi; *irq = gsi_irq_sharing(gsi); return 0; } Loading Loading @@ -543,7 +542,7 @@ acpi_scan_rsdp(unsigned long start, unsigned long length) * RSDP signature. */ for (offset = 0; offset < length; offset += 16) { if (strncmp((char *)(start + offset), "RSD PTR ", sig_len)) if (strncmp((char *)(phys_to_virt(start) + offset), "RSD PTR ", sig_len)) continue; return (start + offset); } Loading
arch/i386/kernel/cpu/amd.c +6 −6 Original line number Diff line number Diff line Loading @@ -206,9 +206,9 @@ static void __init init_amd(struct cpuinfo_x86 *c) display_cacheinfo(c); if (cpuid_eax(0x80000000) >= 0x80000008) { c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1; if (c->x86_num_cores & (c->x86_num_cores - 1)) c->x86_num_cores = 1; c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1; if (c->x86_max_cores & (c->x86_max_cores - 1)) c->x86_max_cores = 1; } #ifdef CONFIG_X86_HT Loading @@ -217,15 +217,15 @@ static void __init init_amd(struct cpuinfo_x86 *c) * distingush the cores. Assumes number of cores is a power * of two. */ if (c->x86_num_cores > 1) { if (c->x86_max_cores > 1) { int cpu = smp_processor_id(); unsigned bits = 0; while ((1 << bits) < c->x86_num_cores) while ((1 << bits) < c->x86_max_cores) bits++; cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1); phys_proc_id[cpu] >>= bits; printk(KERN_INFO "CPU %d(%d) -> Core %d\n", cpu, c->x86_num_cores, cpu_core_id[cpu]); cpu, c->x86_max_cores, cpu_core_id[cpu]); } #endif } Loading
arch/i386/kernel/cpu/common.c +16 −24 Original line number Diff line number Diff line Loading @@ -231,10 +231,10 @@ static void __init early_cpu_detect(void) cpuid(0x00000001, &tfms, &misc, &junk, &cap0); c->x86 = (tfms >> 8) & 15; c->x86_model = (tfms >> 4) & 15; if (c->x86 == 0xf) { if (c->x86 == 0xf) c->x86 += (tfms >> 20) & 0xff; if (c->x86 >= 0x6) c->x86_model += ((tfms >> 16) & 0xF) << 4; } c->x86_mask = tfms & 15; if (cap0 & (1<<19)) c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8; Loading Loading @@ -333,7 +333,7 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c) c->x86_model = c->x86_mask = 0; /* So far unknown... */ c->x86_vendor_id[0] = '\0'; /* Unset */ c->x86_model_id[0] = '\0'; /* Unset */ c->x86_num_cores = 1; c->x86_max_cores = 1; memset(&c->x86_capability, 0, sizeof c->x86_capability); if (!have_cpuid_p()) { Loading Loading @@ -443,52 +443,44 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c) void __devinit detect_ht(struct cpuinfo_x86 *c) { u32 eax, ebx, ecx, edx; int index_msb, tmp; int index_msb, core_bits; int cpu = smp_processor_id(); cpuid(1, &eax, &ebx, &ecx, &edx); c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY)) return; cpuid(1, &eax, &ebx, &ecx, &edx); smp_num_siblings = (ebx & 0xff0000) >> 16; if (smp_num_siblings == 1) { printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); } else if (smp_num_siblings > 1 ) { index_msb = 31; if (smp_num_siblings > NR_CPUS) { printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings); smp_num_siblings = 1; return; } tmp = smp_num_siblings; while ((tmp & 0x80000000 ) == 0) { tmp <<=1 ; index_msb--; } if (smp_num_siblings & (smp_num_siblings - 1)) index_msb++; index_msb = get_count_order(smp_num_siblings); phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); printk(KERN_INFO "CPU: Physical Processor ID: %d\n", phys_proc_id[cpu]); smp_num_siblings = smp_num_siblings / c->x86_num_cores; smp_num_siblings = smp_num_siblings / c->x86_max_cores; tmp = smp_num_siblings; index_msb = 31; while ((tmp & 0x80000000) == 0) { tmp <<=1 ; index_msb--; } index_msb = get_count_order(smp_num_siblings) ; if (smp_num_siblings & (smp_num_siblings - 1)) index_msb++; core_bits = get_count_order(c->x86_max_cores); cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) & ((1 << core_bits) - 1); if (c->x86_num_cores > 1) if (c->x86_max_cores > 1) printk(KERN_INFO "CPU: Processor Core ID: %d\n", cpu_core_id[cpu]); } Loading