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Commit 404e0a19 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

KVM: cpuid: mask more bits in leaf 0xd and subleaves 



- EAX=0Dh, ECX=1: output registers EBX/ECX/EDX are reserved.

- EAX=0Dh, ECX>1: output register ECX bit 0 is clear for all the CPUID
leaves we support, because variable "supported" comes from XCR0 and not
XSS.  Bits above 0 are reserved, so ECX is overall zero.  Output register
EDX is reserved.

Source: Intel Architecture Instruction Set Extensions Programming
Reference, ref. number 319433-022

Reviewed-by: default avatarRadim Krčmář <rkrcmar@redhat.com>
Tested-by: default avatarWanpeng Li <wanpeng.li@linux.intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 412a3c41

arch/x86/kvm/cpuid.c

+8 −2
Original line number Diff line number Diff line
@@ -482,8 +482,14 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, 
					entry[i].ebx =

						xstate_required_size(supported,

								     true);

			} else if (entry[i].eax == 0 || !(supported & mask))

			} else {

				if (entry[i].eax == 0 || !(supported & mask))

					continue;

				if (WARN_ON_ONCE(entry[i].ecx & 1))

					continue;

			}

			entry[i].ecx = 0;

			entry[i].edx = 0;

			entry[i].flags |=

			       KVM_CPUID_FLAG_SIGNIFCANT_INDEX;

			++*nent;