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This patch changes the PIC interrupts delivery. Now it is only delivered to vcpu0 when either condition is met (on vcpu0): 1. local APIC is hardware disabled 2. LVT0 is unmasked and configured to delivery mode ExtInt It fixes the 2x faster wall clock on x86_64 and SMP i386 Linux guests Signed-off-by:Eddie (Yaozu) Dong <eddie.dong@intel.com> Signed-off-by:
Qing He <qing.he@intel.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>