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Commit 3fbdc379 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS fixes from Ralf Baechle:
 "Another round of MIPS fixes for 4.2.  No area does particularly stand
  out but we have a two unpleasant ones:

   - Kernel ptes are marked with a global bit which allows the kernel to
     share kernel TLB entries between all processes.  For this to work
     both entries of an adjacent even/odd pte pair need to have the
     global bit set.  There has been a subtle race in setting the other
     entry's global bit since ~ 2000 but it take particularly
     pathological workloads that essentially do mostly vmalloc/vfree to
     trigger this.

     This pull request fixes the 64-bit case but leaves the case of 32
     bit CPUs with 64 bit ptes unsolved for now.  The unfixed cases
     affect hardware that is not available in the field yet.

   - Instruction emulation requires loading instructions from user space
     but the current fast but simplistic approach will fail on pages
     that are PROT_EXEC but !PROT_READ.  For this reason we temporarily
     do not permit this permission and will map pages with PROT_EXEC |
     PROT_READ.

  The remainder of this pull request is more or less across the field
  and the short log explains them well"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: Make set_pte() SMP safe.
  MIPS: Replace add and sub instructions in relocate_kernel.S with addiu
  MIPS: Flush RPS on kernel entry with EVA
  Revert "MIPS: BCM63xx: Provide a plat_post_dma_flush hook"
  MIPS: BMIPS: Delete unused Kconfig symbol
  MIPS: Export get_c0_perfcount_int()
  MIPS: show_stack: Fix stack trace with EVA
  MIPS: do_mcheck: Fix kernel code dump with EVA
  MIPS: SMP: Don't increment irq_count multiple times for call function IPIs
  MIPS: Partially disable RIXI support.
  MIPS: Handle page faults of executable but unreadable pages correctly.
  MIPS: Malta: Don't reinitialise RTC
  MIPS: unaligned: Fix build error on big endian R6 kernels
  MIPS: Fix sched_getaffinity with MT FPAFF enabled
  MIPS: Fix build with CONFIG_OF=y for non OF-enabled targets
  CPUFREQ: Loongson2: Fix broken build due to incorrect include.
parents af0b3152 46011e6e

arch/mips/Kconfig

+0 −1
Original line number Original line Diff line number Diff line
@@ -151,7 +151,6 @@ config BMIPS_GENERIC 
	select BCM7120_L2_IRQ

	select BCM7120_L2_IRQ

	select BRCMSTB_L2_IRQ

	select BRCMSTB_L2_IRQ

	select IRQ_MIPS_CPU

	select IRQ_MIPS_CPU

	select RAW_IRQ_ACCESSORS

	select DMA_NONCOHERENT

	select DMA_NONCOHERENT

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN

arch/mips/ath79/setup.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -190,6 +190,7 @@ int get_c0_perfcount_int(void) 
{

{

	return ATH79_MISC_IRQ(5);

	return ATH79_MISC_IRQ(5);

}

}

EXPORT_SYMBOL_GPL(get_c0_perfcount_int);





unsigned int get_c0_compare_int(void)

unsigned int get_c0_compare_int(void)

{

{

arch/mips/cavium-octeon/smp.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -42,7 +42,7 @@ static irqreturn_t mailbox_interrupt(int irq, void *dev_id) 
	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);

	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);





	if (action & SMP_CALL_FUNCTION)

	if (action & SMP_CALL_FUNCTION)

		smp_call_function_interrupt();

		generic_smp_call_function_interrupt();

	if (action & SMP_RESCHEDULE_YOURSELF)

	if (action & SMP_RESCHEDULE_YOURSELF)

		scheduler_ipi();

		scheduler_ipi();

arch/mips/include/asm/mach-bcm63xx/dma-coherence.h

deleted100644 → 0
+0 −10
Original line number Original line Diff line number Diff line 
#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H

#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H



#include <asm/bmips.h>



#define plat_post_dma_flush	bmips_post_dma_flush



#include <asm/mach-generic/dma-coherence.h>



#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */

arch/mips/include/asm/pgtable.h

+31 −0
Original line number Original line Diff line number Diff line
@@ -182,8 +182,39 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) 
		 * Make sure the buddy is global too (if it's !none,

		 * Make sure the buddy is global too (if it's !none,

		 * it better already be global)

		 * it better already be global)

		 */

		 */

#ifdef CONFIG_SMP

		/*

		 * For SMP, multiple CPUs can race, so we need to do

		 * this atomically.

		 */

#ifdef CONFIG_64BIT

#define LL_INSN "lld"

#define SC_INSN "scd"

#else /* CONFIG_32BIT */

#define LL_INSN "ll"

#define SC_INSN "sc"

#endif

		unsigned long page_global = _PAGE_GLOBAL;

		unsigned long tmp;



		__asm__ __volatile__ (

			"	.set	push\n"

			"	.set	noreorder\n"

			"1:	" LL_INSN "	%[tmp], %[buddy]\n"

			"	bnez	%[tmp], 2f\n"

			"	 or	%[tmp], %[tmp], %[global]\n"

			"	" SC_INSN "	%[tmp], %[buddy]\n"

			"	beqz	%[tmp], 1b\n"

			"	 nop\n"

			"2:\n"

			"	.set pop"

			: [buddy] "+m" (buddy->pte),

			  [tmp] "=&r" (tmp)

			: [global] "r" (page_global));

#else /* !CONFIG_SMP */

		if (pte_none(*buddy))

		if (pte_none(*buddy))

			pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;

			pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;

#endif /* CONFIG_SMP */

	}

	}

#endif

#endif

}

}