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Commit 3f2dc5ac authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Fix 915GM self-refresh enable/disable 



INSTPM is a masked register so use the _MASKED_BIT_{ENABLE,DISABLE}
macros when enabling/disabling self-refresh on 915GM.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 0fb58223

drivers/gpu/drm/i915/intel_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -1548,7 +1548,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc) 
	if (IS_I945G(dev) || IS_I945GM(dev))

		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN_MASK | 0);

	else if (IS_I915GM(dev))

		I915_WRITE(INSTPM, I915_READ(INSTPM) & ~INSTPM_SELF_EN);

		I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_SELF_EN));



	/* Calc sr entries for one plane configs */

	if (HAS_FW_BLC(dev) && enabled) {
@@ -1600,7 +1600,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc) 
				I915_WRITE(FW_BLC_SELF,

					   FW_BLC_SELF_EN_MASK | FW_BLC_SELF_EN);

			else if (IS_I915GM(dev))

				I915_WRITE(INSTPM, I915_READ(INSTPM) | INSTPM_SELF_EN);

				I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_SELF_EN));

			DRM_DEBUG_KMS("memory self refresh enabled\n");

		} else

			DRM_DEBUG_KMS("memory self refresh disabled\n");