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Commit 3f204647 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/gm100/device: recognise GM107 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent c68c29c0

drivers/gpu/drm/nouveau/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -211,6 +211,7 @@ nouveau-y += core/engine/device/nv40.o 
nouveau-y += core/engine/device/nv50.o

nouveau-y += core/engine/device/nvc0.o

nouveau-y += core/engine/device/nve0.o

nouveau-y += core/engine/device/gm100.o

nouveau-y += core/engine/disp/base.o

nouveau-y += core/engine/disp/nv04.o

nouveau-y += core/engine/disp/nv50.o

drivers/gpu/drm/nouveau/core/engine/device/base.c

+2 −0
Original line number Diff line number Diff line
@@ -185,6 +185,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent, 
			case 0x0e0:

			case 0x0f0:

			case 0x100: device->card_type = NV_E0; break;

			case 0x110: device->card_type = GM100; break;

			default:

				break;

			}
@@ -208,6 +209,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent, 
		case NV_C0:

		case NV_D0: ret = nvc0_identify(device); break;

		case NV_E0: ret = nve0_identify(device); break;

		case GM100: ret = gm100_identify(device); break;

		default:

			ret = -EINVAL;

			break;

drivers/gpu/drm/nouveau/core/engine/device/gm100.c

0 → 100644
+108 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 */



#include <subdev/bios.h>

#include <subdev/bus.h>

#include <subdev/gpio.h>

#include <subdev/i2c.h>

#include <subdev/clock.h>

#include <subdev/therm.h>

#include <subdev/mxm.h>

#include <subdev/devinit.h>

#include <subdev/mc.h>

#include <subdev/timer.h>

#include <subdev/fb.h>

#include <subdev/ltcg.h>

#include <subdev/ibus.h>

#include <subdev/instmem.h>

#include <subdev/vm.h>

#include <subdev/bar.h>

#include <subdev/pwr.h>

#include <subdev/volt.h>



#include <engine/device.h>

#include <engine/dmaobj.h>

#include <engine/fifo.h>

#include <engine/software.h>

#include <engine/graph.h>

#include <engine/disp.h>

#include <engine/copy.h>

#include <engine/bsp.h>

#include <engine/vp.h>

#include <engine/ppp.h>

#include <engine/perfmon.h>



int

gm100_identify(struct nouveau_device *device)

{

	switch (device->chipset) {

	case 0x117:

		device->cname = "GM107";

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_GPIO   ] = &nve0_gpio_oclass;

		device->oclass[NVDEV_SUBDEV_I2C    ] = &nvd0_i2c_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nve0_clock_oclass;

#if 0

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;

#endif

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gm107_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTCG   ] =  gm107_ltcg_oclass;

		device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nvc0_bar_oclass;

#if 0

		device->oclass[NVDEV_SUBDEV_PWR    ] = &nv108_pwr_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_GR     ] =  nv108_graph_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;

#endif

		device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_BSP    ] = &nve0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

#endif

		break;

	default:

		nv_fatal(device, "unknown Maxwell chipset\n");

		return -EINVAL;

	}



	return 0;

}

drivers/gpu/drm/nouveau/core/include/core/device.h

+1 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ struct nouveau_device { 
		NV_C0    = 0xc0,

		NV_D0    = 0xd0,

		NV_E0    = 0xe0,

		GM100    = 0x110,

	} card_type;

	u32 chipset;

	u32 crystal;

drivers/gpu/drm/nouveau/core/include/engine/device.h

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ int nv40_identify(struct nouveau_device *); 
int nv50_identify(struct nouveau_device *);

int nvc0_identify(struct nouveau_device *);

int nve0_identify(struct nouveau_device *);

int gm100_identify(struct nouveau_device *);



struct nouveau_device *nouveau_device_find(u64 name);