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Commit 3e9679a3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Ingo Molnar:
 "Three fixes, a hw-enablement and a cross-arch fix/enablement change:

   - SGI/UV fix for older platforms

   - x32 signal handling fix

   - older x86 platform bootup APIC fix

   - AVX512-4VNNIW (Neural Network Instructions) and AVX512-4FMAPS
     (Multiply Accumulation Single precision instructions) enablement.

   - move thread_info back into x86 specific code, to make life easier
     for other architectures trying to make use of
     CONFIG_THREAD_INFO_IN_TASK_STRUCT=y"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/boot/smp: Don't try to poke disabled/non-existent APIC
  sched/core, x86: Make struct thread_info arch specific again
  x86/signal: Remove bogus user_64bit_mode() check from sigaction_compat_abi()
  x86/platform/UV: Fix support for EFI_OLD_MEMMAP after BIOS callback updates
  x86/cpufeature: Add AVX512_4VNNIW and AVX512_4FMAPS features
  x86/vmware: Skip timer_irq_works() check on VMware
parents 86c5bf71 ff856051

arch/x86/include/asm/cpufeatures.h

+2 −0
Original line number Diff line number Diff line
@@ -194,6 +194,8 @@ 
#define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */



#define X86_FEATURE_INTEL_PT	( 7*32+15) /* Intel Processor Trace */

#define X86_FEATURE_AVX512_4VNNIW (7*32+16) /* AVX-512 Neural Network Instructions */

#define X86_FEATURE_AVX512_4FMAPS (7*32+17) /* AVX-512 Multiply Accumulation Single precision */



/* Virtualization flags: Linux defined, word 8 */

#define X86_FEATURE_TPR_SHADOW  ( 8*32+ 0) /* Intel TPR Shadow */

arch/x86/include/asm/thread_info.h

+9 −0
Original line number Diff line number Diff line
@@ -52,6 +52,15 @@ struct task_struct; 
#include <asm/cpufeature.h>

#include <linux/atomic.h>



struct thread_info {

	unsigned long		flags;		/* low level flags */

};



#define INIT_THREAD_INFO(tsk)			\

{						\

	.flags		= 0,			\

}



#define init_stack		(init_thread_union.stack)



#else /* !__ASSEMBLY__ */

arch/x86/kernel/cpu/scattered.c

+2 −0
Original line number Diff line number Diff line
@@ -32,6 +32,8 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) 


	static const struct cpuid_bit cpuid_bits[] = {

		{ X86_FEATURE_INTEL_PT,		CR_EBX,25, 0x00000007, 0 },

		{ X86_FEATURE_AVX512_4VNNIW,	CR_EDX, 2, 0x00000007, 0 },

		{ X86_FEATURE_AVX512_4FMAPS,	CR_EDX, 3, 0x00000007, 0 },

		{ X86_FEATURE_APERFMPERF,	CR_ECX, 0, 0x00000006, 0 },

		{ X86_FEATURE_EPB,		CR_ECX, 3, 0x00000006, 0 },

		{ X86_FEATURE_HW_PSTATE,	CR_EDX, 7, 0x80000007, 0 },

arch/x86/kernel/cpu/vmware.c

+5 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <asm/div64.h>

#include <asm/x86_init.h>

#include <asm/hypervisor.h>

#include <asm/timer.h>

#include <asm/apic.h>



#define CPUID_VMWARE_INFO_LEAF	0x40000000
@@ -94,6 +95,10 @@ static void __init vmware_platform_setup(void) 
	} else {

		pr_warn("Failed to get TSC freq from the hypervisor\n");

	}



#ifdef CONFIG_X86_IO_APIC

	no_timer_check = 1;

#endif

}



/*

arch/x86/kernel/fpu/xstate.c

+2 −0
Original line number Diff line number Diff line
@@ -74,6 +74,8 @@ void fpu__xstate_clear_all_cpu_caps(void) 
	setup_clear_cpu_cap(X86_FEATURE_MPX);

	setup_clear_cpu_cap(X86_FEATURE_XGETBV1);

	setup_clear_cpu_cap(X86_FEATURE_PKU);

	setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW);

	setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS);

}



/*