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Commit 3d30b28b authored by Oded Gabbay's avatar Oded Gabbay
Browse files

drm/amdkfd: Use generic defines in new amd headers 



This patch makes use of the new amd headers (that are part of the new
amdgpu driver), instead of private defines.

Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
parent d7b8f73e

drivers/gpu/drm/amd/amdkfd/cik_regs.h

+0 −11
Original line number Diff line number Diff line
@@ -65,17 +65,6 @@ 


#define	AQL_ENABLE					1



#define	SDMA_RB_VMID(x)					(x << 24)

#define	SDMA_RB_ENABLE					(1 << 0)

#define	SDMA_RB_SIZE(x)					((x) << 1) /* log2 */

#define	SDMA_RPTR_WRITEBACK_ENABLE			(1 << 12)

#define	SDMA_RPTR_WRITEBACK_TIMER(x)			((x) << 16) /* log2 */

#define	SDMA_OFFSET(x)					(x << 0)

#define	SDMA_DB_ENABLE					(1 << 28)

#define	SDMA_ATC					(1 << 0)

#define	SDMA_VA_PTR32					(1 << 4)

#define	SDMA_VA_SHARED_BASE(x)				(x << 8)



#define GRBM_GFX_INDEX					0x30800



#define	ATC_VMID_PASID_MAPPING_VALID			(1U << 31)

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c

+8 −4
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include "kfd_device_queue_manager.h"

#include "cik_regs.h"

#include "oss/oss_2_4_sh_mask.h"



static bool set_cache_memory_policy_cik(struct device_queue_manager *dqm,

				   struct qcm_process_device *qpd,
@@ -135,13 +136,16 @@ static int register_process_cik(struct device_queue_manager *dqm, 
static void init_sdma_vm(struct device_queue_manager *dqm, struct queue *q,

				struct qcm_process_device *qpd)

{

	uint32_t value = SDMA_ATC;

	uint32_t value = (1 << SDMA0_RLC0_VIRTUAL_ADDR__ATC__SHIFT);



	if (q->process->is_32bit_user_mode)

		value |= SDMA_VA_PTR32 | get_sh_mem_bases_32(qpd_to_pdd(qpd));

		value |= (1 << SDMA0_RLC0_VIRTUAL_ADDR__PTR32__SHIFT) |

				get_sh_mem_bases_32(qpd_to_pdd(qpd));

	else

		value |= SDMA_VA_SHARED_BASE(get_sh_mem_bases_nybble_64(

							qpd_to_pdd(qpd)));

		value |= ((get_sh_mem_bases_nybble_64(qpd_to_pdd(qpd))) <<

				SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE__SHIFT) &&

				SDMA0_RLC0_VIRTUAL_ADDR__SHARED_BASE_MASK;



	q->properties.sdma_vm_addr = value;

}

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c

+13 −7
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include "kfd_mqd_manager.h"

#include "cik_regs.h"

#include "cik_structs.h"

#include "oss/oss_2_4_sh_mask.h"



static inline struct cik_mqd *get_mqd(void *mqd)

{
@@ -214,17 +215,20 @@ static int update_mqd_sdma(struct mqd_manager *mm, void *mqd, 
	BUG_ON(!mm || !mqd || !q);



	m = get_sdma_mqd(mqd);

	m->sdma_rlc_rb_cntl =

		SDMA_RB_SIZE((ffs(q->queue_size / sizeof(unsigned int)))) |

		SDMA_RB_VMID(q->vmid) |

		SDMA_RPTR_WRITEBACK_ENABLE |

		SDMA_RPTR_WRITEBACK_TIMER(6);

	m->sdma_rlc_rb_cntl = ffs(q->queue_size / sizeof(unsigned int)) <<

			SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |

			q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT |

			1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT |

			6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT;



	m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8);

	m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8);

	m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);

	m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);

	m->sdma_rlc_doorbell = SDMA_OFFSET(q->doorbell_off) | SDMA_DB_ENABLE;

	m->sdma_rlc_doorbell = q->doorbell_off <<

			SDMA0_RLC0_DOORBELL__OFFSET__SHIFT |

			1 << SDMA0_RLC0_DOORBELL__ENABLE__SHIFT;



	m->sdma_rlc_virtual_addr = q->sdma_vm_addr;



	m->sdma_engine_id = q->sdma_engine_id;
@@ -234,7 +238,9 @@ static int update_mqd_sdma(struct mqd_manager *mm, void *mqd, 
	if (q->queue_size > 0 &&

			q->queue_address != 0 &&

			q->queue_percent > 0) {

		m->sdma_rlc_rb_cntl |= SDMA_RB_ENABLE;

		m->sdma_rlc_rb_cntl |=

				1 << SDMA0_RLC0_RB_CNTL__RB_ENABLE__SHIFT;



		q->is_active = true;

	}