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Commit 3ca82da3 authored by Michel Dänzer's avatar Michel Dänzer Committed by Dave Airlie
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drm/radeon/kms: Only restrict BO to visible VRAM size when pinning to VRAM. 



This prevented radeon.test=1 from testing transfers from/to GTT beyond the
visible VRAM size.

Signed-off-by: default avatarMichel Dänzer <daenzer@vmware.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent b8c40d62

drivers/gpu/drm/radeon/radeon_object.c

+4 −2
Original line number Diff line number Diff line
@@ -185,8 +185,10 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) 
		return 0;

	}

	radeon_ttm_placement_from_domain(bo, domain);

	if (domain == RADEON_GEM_DOMAIN_VRAM) {

		/* force to pin into visible video ram */

		bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

	}

	for (i = 0; i < bo->placement.num_placement; i++)

		bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;

	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);