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Commit 3c867696 authored by Omar Ramirez Luna's avatar Omar Ramirez Luna Committed by Greg Kroah-Hartman
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staging: tidspbridge: change type to __iomem for per and core addresses 



Currently per_pm_base and core_pm_base are declared as u32, however
_raw_* changed the data type, since:

195bbcac ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors

This should fix warnings for per and core accesses:

warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
../io.h:88: note: expected 'volatile void *' but argument is of type 'u32'

Signed-off-by: default avatarOmar Ramirez Luna <omar.ramirez@copitl.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 53e3e3f1

drivers/staging/tidspbridge/include/dspbridge/cfgdefs.h

+2 −2
Original line number Diff line number Diff line
@@ -53,8 +53,8 @@ struct cfg_hostres { 
	u32 chnl_buf_size;

	u32 num_chnls;

	void __iomem *per_base;

	u32 per_pm_base;

	u32 core_pm_base;

	void __iomem *per_pm_base;

	void __iomem *core_pm_base;

	void __iomem *dmmu_base;

};

drivers/staging/tidspbridge/rmgr/drv.c

+4 −4
Original line number Diff line number Diff line
@@ -667,9 +667,9 @@ int drv_request_bridge_res_dsp(void **phost_resources) 
							 OMAP_DSP_MEM3_SIZE);

		host_res->per_base = ioremap(OMAP_PER_CM_BASE,

						OMAP_PER_CM_SIZE);

		host_res->per_pm_base = (u32) ioremap(OMAP_PER_PRM_BASE,

		host_res->per_pm_base = ioremap(OMAP_PER_PRM_BASE,

						OMAP_PER_PRM_SIZE);

		host_res->core_pm_base = (u32) ioremap(OMAP_CORE_PRM_BASE,

		host_res->core_pm_base = ioremap(OMAP_CORE_PRM_BASE,

							OMAP_CORE_PRM_SIZE);

		host_res->dmmu_base = ioremap(OMAP_DMMU_BASE,

						 OMAP_DMMU_SIZE);