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Commit 3a8f21f1 authored by Thor Thayer's avatar Thor Thayer Committed by Borislav Petkov
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EDAC, altera: Make L2C depend on L2x0 cache controller



Make L2 cache depend instead of forcibly select the L2 cache support.

Signed-off-by: default avatarThor Thayer <tthayer@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-2-git-send-email-tthayer@opensource.altera.com


Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parent f55532a0
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+2 −3
Original line number Diff line number Diff line
@@ -378,12 +378,11 @@ config EDAC_ALTERA

config EDAC_ALTERA_L2C
	bool "Altera L2 Cache ECC"
	depends on EDAC_ALTERA=y
	select CACHE_L2X0
	depends on EDAC_ALTERA=y && CACHE_L2X0
	help
	  Support for error detection and correction on the
	  Altera L2 cache Memory for Altera SoCs. This option
	  requires L2 cache so it will force that selection.
	  requires L2 cache.

config EDAC_ALTERA_OCRAM
	bool "Altera On-Chip RAM ECC"