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Commit 38bf3a79 authored by Mike Turquette's avatar Mike Turquette
Browse files

Merge branch 'clk-pxa27x' into clk-next

parents 44b4aa97 9ff25d7b

Documentation/devicetree/bindings/clock/pxa-clock.txt

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+16 −0
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* Clock bindings for Marvell PXA chips



Required properties:

- compatible: Should be "marvell,pxa-clocks"

- #clock-cells: Should be <1>



The clock consumer should specify the desired clock by having the clock

ID in its "clocks" phandle cell (see include/.../pxa-clock.h).



Examples:



pxa2xx_clks: pxa2xx_clks@41300004 {

        compatible = "marvell,pxa-clocks";

        #clock-cells = <1>;

        status = "okay";

};

arch/arm/Kconfig

+1 −0
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@@ -621,6 +621,7 @@ config ARCH_PXA 
	select ARCH_REQUIRE_GPIOLIB

	select ARM_CPU_SUSPEND if PM

	select AUTO_ZRELADDR

	select COMMON_CLK if PXA27x

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select CLKSRC_OF

arch/arm/boot/dts/pxa27x.dtsi

+19 −1
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/* The pxa3xx skeleton simply augments the 2xx version */

/include/ "pxa2xx.dtsi"

#include "pxa2xx.dtsi"

#include "dt-bindings/clock/pxa2xx-clock.h"



/ {

	model = "Marvell PXA27x familiy SoC";
@@ -35,4 +36,21 @@ 
			#pwm-cells = <1>;

		};

	};



	clocks {

	       /*

		* The muxing of external clocks/internal dividers for osc* clock

		* sources has been hidden under the carpet by now.

		*/

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		pxa2xx_clks: pxa2xx_clks@41300004 {

			compatible = "marvell,pxa-clocks";

			#clock-cells = <1>;

			status = "okay";

		};

	};



};

arch/arm/mach-pxa/Makefile

+4 −5
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@@ -3,16 +3,15 @@ 
#



# Common support (must be linked before board specific support)

obj-y				+= clock.o devices.o generic.o irq.o \

				   reset.o

obj-y				+= devices.o generic.o irq.o reset.o

obj-$(CONFIG_PM)		+= pm.o sleep.o standby.o



# Generic drivers that other drivers may depend upon



# SoC-specific code

obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o

obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o

obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o

obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock.o clock-pxa2xx.o pxa2xx.o pxa25x.o

obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o pxa2xx.o pxa27x.o

obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o

obj-$(CONFIG_CPU_PXA300)	+= pxa300.o

obj-$(CONFIG_CPU_PXA320)	+= pxa320.o

obj-$(CONFIG_CPU_PXA930)	+= pxa930.o

arch/arm/mach-pxa/include/mach/pxa2xx-regs.h

+10 −0
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@@ -143,6 +143,16 @@ 
#define CCCR_M_MASK	0x0060	/* Memory Frequency to Run Mode Frequency Multiplier */

#define CCCR_L_MASK	0x001f	/* Crystal Frequency to Memory Frequency Multiplier */



#define CCCR_CPDIS_BIT	(31)

#define CCCR_PPDIS_BIT	(30)

#define CCCR_LCD_26_BIT	(27)

#define CCCR_A_BIT	(25)



#define CCSR_N2_MASK	CCCR_N_MASK

#define CCSR_M_MASK	CCCR_M_MASK

#define CCSR_L_MASK	CCCR_L_MASK

#define CCSR_N2_SHIFT	7



#define CKEN_AC97CONF   (31)    /* AC97 Controller Configuration */

#define CKEN_CAMERA	(24)	/* Camera Interface Clock Enable */

#define CKEN_SSP1	(23)	/* SSP1 Unit Clock Enable */